Mesa (master): radv: synchronize after performing a separate depth/stencil fast clears

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Tue Dec 10 12:59:24 UTC 2019


Module: Mesa
Branch: master
Commit: b603cc8c841c0c3ebec236a648e731caeb0a9b8d
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b603cc8c841c0c3ebec236a648e731caeb0a9b8d

Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date:   Tue Nov 26 16:55:02 2019 +0100

radv: synchronize after performing a separate depth/stencil fast clears

For depth+stencil images, the driver might use an optimized path
if only one aspect is cleared. It either clears the depth or the
stencil part of HTILE. Because the two separate aspects might use
the same HTILE memory we have to synchronize.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>

---

 src/amd/vulkan/radv_meta_clear.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c
index 29905f01f1f..04f0b8a3f9d 100644
--- a/src/amd/vulkan/radv_meta_clear.c
+++ b/src/amd/vulkan/radv_meta_clear.c
@@ -1108,6 +1108,16 @@ radv_fast_clear_depth(struct radv_cmd_buffer *cmd_buffer,
 					      htile_mask);
 	}
 
+	if (iview->image->planes[0].surface.has_stencil &&
+	    !(aspects == (VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT))) {
+		/* Synchronize after performing a depth-only or a stencil-only
+		 * fast clear because the driver uses an optimized path which
+		 * performs a read-modify-write operation, and the two separate
+		 * aspects might use the same HTILE memory.
+		 */
+		cmd_buffer->state.flush_bits |= flush_bits;
+	}
+
 	radv_update_ds_clear_metadata(cmd_buffer, iview, clear_value, aspects);
 	if (post_flush) {
 		*post_flush |= flush_bits;




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