Mesa (master): radeonsi/gfx10: disable vertex grouping

GitLab Mirror gitlab-mirror at kemper.freedesktop.org
Tue Dec 10 21:35:41 UTC 2019


Module: Mesa
Branch: master
Commit: 42f921387b9c939cf1d809fa447d7980f73aa591
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=42f921387b9c939cf1d809fa447d7980f73aa591

Author: Marek Olšák <marek.olsak at amd.com>
Date:   Mon Oct 28 16:37:53 2019 -0400

radeonsi/gfx10: disable vertex grouping

based on PAL.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>

---

 src/gallium/drivers/radeonsi/si_state_draw.c    | 7 ++-----
 src/gallium/drivers/radeonsi/si_state_shaders.c | 2 +-
 2 files changed, 3 insertions(+), 6 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 9aacc9e176d..aa974d85811 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -724,25 +724,22 @@ static void gfx10_emit_ge_cntl(struct si_context *sctx, unsigned num_patches)
 	if (sctx->ngg) {
 		if (sctx->tes_shader.cso) {
 			ge_cntl = S_03096C_PRIM_GRP_SIZE(num_patches) |
-				  S_03096C_VERT_GRP_SIZE(0) |
+				  S_03096C_VERT_GRP_SIZE(256) | /* 256 = disable vertex grouping */
 				  S_03096C_BREAK_WAVE_AT_EOI(key.u.tess_uses_prim_id);
 		} else {
 			ge_cntl = si_get_vs_state(sctx)->ge_cntl;
 		}
 	} else {
 		unsigned primgroup_size;
-		unsigned vertgroup_size;
+		unsigned vertgroup_size = 256; /* 256 = disable vertex grouping */;
 
 		if (sctx->tes_shader.cso) {
 			primgroup_size = num_patches; /* must be a multiple of NUM_PATCHES */
-			vertgroup_size = 0;
 		} else if (sctx->gs_shader.cso) {
 			unsigned vgt_gs_onchip_cntl = sctx->gs_shader.current->ctx_reg.gs.vgt_gs_onchip_cntl;
 			primgroup_size = G_028A44_GS_PRIMS_PER_SUBGRP(vgt_gs_onchip_cntl);
-			vertgroup_size = G_028A44_ES_VERTS_PER_SUBGRP(vgt_gs_onchip_cntl);
 		} else {
 			primgroup_size = 128; /* recommended without a GS and tess */
-			vertgroup_size = 0;
 		}
 
 		ge_cntl = S_03096C_PRIM_GRP_SIZE(primgroup_size) |
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
index dcad27fec05..d70b9a92669 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -1240,7 +1240,7 @@ static void gfx10_shader_ngg(struct si_screen *sscreen, struct si_shader *shader
 
 	shader->ge_cntl =
 		S_03096C_PRIM_GRP_SIZE(shader->ngg.max_gsprims) |
-		S_03096C_VERT_GRP_SIZE(shader->ngg.hw_max_esverts) |
+		S_03096C_VERT_GRP_SIZE(256) | /* 256 = disable vertex grouping */
 		S_03096C_BREAK_WAVE_AT_EOI(break_wave_at_eoi);
 
 	/* Bug workaround for a possible hang with non-tessellation cases.




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