Mesa (master): freedreno: Drop the extra offset field for mipmap slices.

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Module: Mesa
Branch: master
Commit: 97be9503bb1aba3017b1ff682e14f9a6c60d91a0
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=97be9503bb1aba3017b1ff682e14f9a6c60d91a0

Author: Eric Anholt <eric at anholt.net>
Date:   Thu Nov 21 14:53:58 2019 -0800

freedreno: Drop the extra offset field for mipmap slices.

We can just bake the UBWC-goes-first delta into the slices at setup time.
I did have to fix up the resource shadowing swap path to swap the slice
fields, as it was missing and regressed the format reinterpets otherwise.

Reviewed-by: Kristian H. Kristensen <hoegsberg at google.com>

---

 src/freedreno/fdl/freedreno_layout.h               | 5 +----
 src/gallium/drivers/freedreno/a6xx/fd6_resource.c  | 6 +++++-
 src/gallium/drivers/freedreno/freedreno_resource.c | 3 ++-
 3 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/src/freedreno/fdl/freedreno_layout.h b/src/freedreno/fdl/freedreno_layout.h
index c17120a8ac6..40989c33371 100644
--- a/src/freedreno/fdl/freedreno_layout.h
+++ b/src/freedreno/fdl/freedreno_layout.h
@@ -100,7 +100,6 @@ struct fdl_layout {
 	uint32_t width0, height0, depth0;
 
 	/* UBWC specific fields: */
-	uint32_t offset;         /* offset to start of pixel data */
 	uint32_t ubwc_offset;    /* offset to UBWC meta data */
 	uint32_t ubwc_pitch;
 	uint32_t ubwc_size;
@@ -119,9 +118,7 @@ static inline uint32_t
 fdl_surface_offset(const struct fdl_layout *layout, unsigned level, unsigned layer)
 {
 	const struct fdl_slice *slice = &layout->slices[level];
-	unsigned offset = slice->offset;
-	offset += fdl_layer_stride(layout, level) * layer;
-	return offset + layout->offset;
+	return slice->offset + fdl_layer_stride(layout, level) * layer;
 }
 
 static inline uint32_t
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_resource.c b/src/gallium/drivers/freedreno/a6xx/fd6_resource.c
index 4acb80f1508..8b5e79c4ae8 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_resource.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_resource.c
@@ -262,8 +262,12 @@ fd6_fill_ubwc_buffer_sizes(struct fd_resource *rsc)
 	 * because it is what the kernel expects for scanout.  For non-2D we
 	 * could just use a separate UBWC buffer..
 	 */
+	for (int level = 0; level <= prsc->last_level; level++) {
+		struct fdl_slice *slice = fd_resource_slice(rsc, level);
+		slice->offset += meta_size;
+	}
+
 	rsc->layout.ubwc_offset = 0;
-	rsc->layout.offset = meta_size;
 	rsc->layout.ubwc_pitch = meta_stride;
 	rsc->layout.ubwc_size = meta_size >> 2;   /* in dwords??? */
 	rsc->layout.tile_mode = TILE6_3;
diff --git a/src/gallium/drivers/freedreno/freedreno_resource.c b/src/gallium/drivers/freedreno/freedreno_resource.c
index c17bd365f1a..3e74e0c5a00 100644
--- a/src/gallium/drivers/freedreno/freedreno_resource.c
+++ b/src/gallium/drivers/freedreno/freedreno_resource.c
@@ -223,7 +223,8 @@ fd_try_shadow_resource(struct fd_context *ctx, struct fd_resource *rsc,
 	/* TODO valid_buffer_range?? */
 	swap(rsc->bo,        shadow->bo);
 	swap(rsc->write_batch,   shadow->write_batch);
-	swap(rsc->layout.offset, shadow->layout.offset);
+	for (int level = 0; level <= prsc->last_level; level++)
+		swap(rsc->layout.slices[level], shadow->layout.slices[level]);
 	swap(rsc->layout.ubwc_offset, shadow->layout.ubwc_offset);
 	swap(rsc->layout.ubwc_pitch, shadow->layout.ubwc_pitch);
 	swap(rsc->layout.ubwc_size, shadow->layout.ubwc_size);