Mesa (master): etnaviv: sRGB render target support

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Module: Mesa
Branch: master
Commit: b7730c54a9243405f87eadfdfc72562e821c27fb
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b7730c54a9243405f87eadfdfc72562e821c27fb

Author: Jonathan Marek <jonathan at marek.ca>
Date:   Sun Oct 20 02:21:43 2019 -0400

etnaviv: sRGB render target support

Note: no srgb render target support before HALTI3

Signed-off-by: Jonathan Marek <jonathan at marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner at gmail.com>

---

 src/gallium/drivers/etnaviv/etnaviv_screen.c  | 37 +++++++++++++++++----------
 src/gallium/drivers/etnaviv/etnaviv_state.c   |  8 +++++-
 src/gallium/drivers/etnaviv/etnaviv_surface.c |  2 +-
 3 files changed, 32 insertions(+), 15 deletions(-)

diff --git a/src/gallium/drivers/etnaviv/etnaviv_screen.c b/src/gallium/drivers/etnaviv/etnaviv_screen.c
index 1f515ade6fd..823042a1f25 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_screen.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_screen.c
@@ -412,6 +412,28 @@ gpu_supports_texture_format(struct etna_screen *screen, uint32_t fmt,
    return true;
 }
 
+static bool
+gpu_supports_render_format(struct etna_screen *screen, enum pipe_format format,
+                           unsigned sample_count)
+{
+   if (translate_pe_format(format) == ETNA_NO_MATCH)
+      return false;
+
+   /* Validate MSAA; number of samples must be allowed, and render target
+    * must have MSAA'able format. */
+   if (sample_count > 1) {
+      if (!translate_samples_to_xyscale(sample_count, NULL, NULL))
+         return false;
+      if (translate_ts_format(format) == ETNA_NO_MATCH)
+         return false;
+   }
+
+   if (util_format_is_srgb(format))
+      return VIV_FEATURE(screen, chipMinorFeatures5, HALTI3);
+
+   return true;
+}
+
 static bool
 etna_screen_is_format_supported(struct pipe_screen *pscreen,
                                 enum pipe_format format,
@@ -430,19 +452,8 @@ etna_screen_is_format_supported(struct pipe_screen *pscreen,
       return false;
 
    if (usage & PIPE_BIND_RENDER_TARGET) {
-      /* if render target, must be RS-supported format */
-      if (translate_pe_format(format) != ETNA_NO_MATCH) {
-         /* Validate MSAA; number of samples must be allowed, and render target
-          * must have MSAA'able format. */
-         if (sample_count > 1) {
-            if (translate_samples_to_xyscale(sample_count, NULL, NULL) &&
-                translate_ts_format(format) != ETNA_NO_MATCH) {
-               allowed |= PIPE_BIND_RENDER_TARGET;
-            }
-         } else {
-            allowed |= PIPE_BIND_RENDER_TARGET;
-         }
-      }
+      if (gpu_supports_render_format(screen, format, sample_count))
+         allowed |= PIPE_BIND_RENDER_TARGET;
    }
 
    if (usage & PIPE_BIND_DEPTH_STENCIL) {
diff --git a/src/gallium/drivers/etnaviv/etnaviv_state.c b/src/gallium/drivers/etnaviv/etnaviv_state.c
index 0fde8e76fa8..314bd355c09 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_state.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_state.c
@@ -136,6 +136,7 @@ etna_set_framebuffer_state(struct pipe_context *pctx,
    /* Set up TS as well. Warning: this state is used by both the RS and PE */
    uint32_t ts_mem_config = 0;
    uint32_t pe_mem_config = 0;
+   uint32_t pe_logic_op = 0;
 
    if (fb->nr_cbufs > 0) { /* at least one color buffer? */
       struct etna_surface *cbuf = etna_surface(fb->cbufs[0]);
@@ -209,6 +210,9 @@ etna_set_framebuffer_state(struct pipe_context *pctx,
       }
 
       nr_samples_color = cbuf->base.texture->nr_samples;
+
+      if (util_format_is_srgb(cbuf->base.format))
+         pe_logic_op |= VIVS_PE_LOGIC_OP_SRGB;
    } else {
       /* Clearing VIVS_PE_COLOR_FORMAT_COMPONENTS__MASK and
        * VIVS_PE_COLOR_FORMAT_OVERWRITE prevents us from overwriting the
@@ -353,8 +357,10 @@ etna_set_framebuffer_state(struct pipe_context *pctx,
    /* Single buffer setup. There is only one switch for this, not a separate
     * one per color buffer / depth buffer. To keep the logic simple always use
     * single buffer when this feature is available.
+    * note: the blob will use 2 in some situations, figure out why?
     */
-   cs->PE_LOGIC_OP = VIVS_PE_LOGIC_OP_SINGLE_BUFFER(ctx->specs.single_buffer ? 3 : 0);
+   pe_logic_op |= VIVS_PE_LOGIC_OP_SINGLE_BUFFER(ctx->specs.single_buffer ? 3 : 0);
+   cs->PE_LOGIC_OP = pe_logic_op;
 
    /* keep copy of original structure */
    util_copy_framebuffer_state(&ctx->framebuffer_s, fb);
diff --git a/src/gallium/drivers/etnaviv/etnaviv_surface.c b/src/gallium/drivers/etnaviv/etnaviv_surface.c
index 153ab837246..420329ac3b3 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_surface.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_surface.c
@@ -111,7 +111,7 @@ etna_create_surface(struct pipe_context *pctx, struct pipe_resource *prsc,
    }
 
    surf->base.texture = &rsc->base;
-   surf->base.format = rsc->base.format;
+   surf->base.format = templat->format;
    surf->base.width = rsc->levels[level].width;
    surf->base.height = rsc->levels[level].height;
    surf->base.writable = templat->writable; /* what is this for anyway */