Mesa (master): amd/common: Handle alignment of 96-bit formats.

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Module: Mesa
Branch: master
Commit: 88f567b5ce3c692dbee60ba58df3af7c614e4333
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=88f567b5ce3c692dbee60ba58df3af7c614e4333

Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date:   Mon Dec 23 02:02:20 2019 +0100

amd/common: Handle alignment of 96-bit formats.

addrlib doesn't quite do it right, so do it ourselves.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2162
CC: <mesa-stable at lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Marek Olšák <marek.olsak at amd.com>

---

 src/amd/common/ac_surface.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c
index 81c77e280ae..9cc2b932830 100644
--- a/src/amd/common/ac_surface.c
+++ b/src/amd/common/ac_surface.c
@@ -206,6 +206,17 @@ static int gfx6_compute_level(ADDR_HANDLE addrlib,
 		AddrSurfInfoIn->width = align(AddrSurfInfoIn->width, alignment);
 	}
 
+	/* addrlib assumes the bytes/pixel is a divisor of 64, which is not
+	 * true for r32g32b32 formats. */
+	if (AddrSurfInfoIn->bpp == 96) {
+		assert(config->info.levels == 1);
+		assert(AddrSurfInfoIn->tileMode == ADDR_TM_LINEAR_ALIGNED);
+
+		/* The least common multiple of 64 bytes and 12 bytes/pixel is
+		 * 192 bytes, or 16 pixels. */
+		AddrSurfInfoIn->width = align(AddrSurfInfoIn->width, 16);
+	}
+
 	if (config->is_3d)
 		AddrSurfInfoIn->numSlices = u_minify(config->info.depth, level);
 	else if (config->is_cube)