Mesa (master): virgl: Set sRGB write control CAP based on host capabilities

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Module: Mesa
Branch: master
Commit: 2845939d6a720454f983e2e9a591735bd0fede9e
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=2845939d6a720454f983e2e9a591735bd0fede9e

Author: Gert Wollny <gert.wollny at collabora.com>
Date:   Tue Nov 13 11:39:06 2018 +0100

virgl: Set sRGB write control CAP based on host capabilities

v2: - Use the renamed CAPS
    - add assetions to make sure that mesa doesn't try to switch
      destination surface formats when it is not supported. (Ilia Mirkin)

Signed-off-by: Gert Wollny <gert.wollny at collabora.com>
Reviewed-by: Gurchetan Singh <gurchetansingh at chromium.org>

---

 src/gallium/drivers/virgl/virgl_context.c | 10 ++++++++++
 src/gallium/drivers/virgl/virgl_hw.h      |  1 +
 src/gallium/drivers/virgl/virgl_screen.c  |  2 ++
 3 files changed, 13 insertions(+)

diff --git a/src/gallium/drivers/virgl/virgl_context.c b/src/gallium/drivers/virgl/virgl_context.c
index 6ed4e2f839..08f85f8574 100644
--- a/src/gallium/drivers/virgl/virgl_context.c
+++ b/src/gallium/drivers/virgl/virgl_context.c
@@ -229,6 +229,11 @@ static struct pipe_surface *virgl_create_surface(struct pipe_context *ctx,
    if (!surf)
       return NULL;
 
+   assert(ctx->screen->get_param(ctx->screen,
+                                 PIPE_CAP_DEST_SURFACE_SRGB_CONTROL) ||
+          (util_format_is_srgb(templ->format) ==
+           util_format_is_srgb(resource->format)));
+
    res->clean = FALSE;
    handle = virgl_object_assign_handle();
    pipe_reference_init(&surf->base.reference, 1);
@@ -990,6 +995,11 @@ static void virgl_blit(struct pipe_context *ctx,
    struct virgl_resource *dres = virgl_resource(blit->dst.resource);
    struct virgl_resource *sres = virgl_resource(blit->src.resource);
 
+   assert(ctx->screen->get_param(ctx->screen,
+                                 PIPE_CAP_DEST_SURFACE_SRGB_CONTROL) ||
+          (util_format_is_srgb(blit->dst.resource->format) ==
+            util_format_is_srgb(blit->dst.format)));
+
    dres->clean = FALSE;
    virgl_encode_blit(vctx, dres, sres,
                     blit);
diff --git a/src/gallium/drivers/virgl/virgl_hw.h b/src/gallium/drivers/virgl/virgl_hw.h
index e682c750e7..7b4c063f35 100644
--- a/src/gallium/drivers/virgl/virgl_hw.h
+++ b/src/gallium/drivers/virgl/virgl_hw.h
@@ -232,6 +232,7 @@ enum virgl_formats {
 #define VIRGL_CAP_TEXTURE_BARRIER      (1 << 12)
 #define VIRGL_CAP_TGSI_COMPONENTS      (1 << 13)
 #define VIRGL_CAP_GUEST_MAY_INIT_LOG   (1 << 14)
+#define VIRGL_CAP_SRGB_WRITE_CONTROL   (1 << 15)
 
 /* virgl bind flags - these are compatible with mesa 10.5 gallium.
  * but are fixed, no other should be passed to virgl either.
diff --git a/src/gallium/drivers/virgl/virgl_screen.c b/src/gallium/drivers/virgl/virgl_screen.c
index ef9af21acf..42e0987e0c 100644
--- a/src/gallium/drivers/virgl/virgl_screen.c
+++ b/src/gallium/drivers/virgl/virgl_screen.c
@@ -342,6 +342,8 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
       return 0;
    case PIPE_CAP_NATIVE_FENCE_FD:
       return vscreen->vws->supports_fences;
+   case PIPE_CAP_DEST_SURFACE_SRGB_CONTROL:
+      return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_SRGB_WRITE_CONTROL;
    default:
       return u_pipe_screen_get_param_defaults(screen, param);
    }