Mesa (19.1): 35 new commits
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Fri Jul 5 16:11:25 UTC 2019
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=77598ddfac8cb82f85aefee605351dd65503f973
Author: Jason Ekstrand <jason at jlekstrand.net>
Date: Thu Jul 4 18:26:20 2019 -0500
iris: Use a uint16_t for key sizes
sizeof(struct brw_vs_prog_key) == 324.
Cc: mesa-stable at lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
(cherry picked from commit 4633298fd62121a466884998cb64d7a5b5976fcd)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=50c3dcd2f8a4f3d5114d26a66f1472f618d10e46
Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date: Tue Jul 2 11:32:44 2019 +0200
radv: Fix interactions between variable descriptor count and inline uniform blocks.
Fixes: d7e6541cc72 "radv: Only allocate supplied number of descriptors when variable."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
(cherry picked from commit 8a053254b81497cb6b0708fe86986e461ee43771)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=202eb29e5522b7480c33937f9fd5db43774ad381
Author: Juan A. Suarez Romero <jasuarez at igalia.com>
Date: Tue Jul 2 19:36:56 2019 +0200
intel: fix wrong format usage
Do not use the view format when filling the surface state.
Fixes dEQP-VK.image.texel_view_compatible.compute.extended.texture.*
Fixes: fb1350c76f1 ("intel: Add and use helpers for level0 extent")
Reviewed-by: Nanley Chery <nanley.g.chery at intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
(cherry picked from commit e06bc0b16671b78032e06d9ddd547bb091501129)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=95cfcc3b4370b1fbdfdd1a8ceb7cf2cf672ad63c
Author: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
Date: Mon Jul 1 16:06:13 2019 -0700
spirv: Ignore ArrayStride in OpPtrAccessChain for Workgroup
From OpPtrAccessChain description in the SPIR-V spec (1.4 rev 1):
For objects in the Uniform, StorageBuffer, or PushConstant storage
classes, the element’s address or location is calculated using a
stride, which will be the Base-type’s Array Stride when the Base
type is decorated with ArrayStride. For all other objects, the
implementation will calculate the element’s address or location.
For non-CL shaders the driver should layout the Workgroup storage
class, so override any explicitly set ArrayStride in the shader. This
currently fixes only the lower_workgroup_access_to_offsets case, which
is used by anv.
Reviewed-by: Juan A. Suarez <jasuarez at igalia.com>
(cherry picked from commit 050eb6389a8867e6173644fbb6b2d13ad0db454b)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cb3072488cd327155206e92d1ad8eb72a23ab04e
Author: Arfrever Frehtes Taifersar Arahesis <Arfrever at Apache.Org>
Date: Mon Jun 17 18:37:44 2019 +0000
meson: Improve detection of Python when using Meson >=0.50.
Previously, on systems where multiple versions of Python 3 (e.g. 3.6 and 3.7)
are installed, wrong version of Python 3 could have been used.
The proper fix requires availability of path() method in Meson's python
module, which has been added in Meson 0.50:
https://github.com/mesonbuild/meson/pull/4616
Distro Bug: https://bugs.gentoo.org/671308
Signed-off-by: Arfrever Frehtes Taifersar Arahesis <Arfrever at Apache.Org>
Reviewed-by: Dylan Baker <dylan at pnwbakers.com>
v2: - Add missing `endif` keyword (Dylan)
(cherry picked from commit b120a02b21791ef9898dd342af8102ec9f4d36d9)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3d0e6d3cff657923889422d53e24bee70daa74d1
Author: Jory Pratt <anarchy at gentoo.org>
Date: Tue May 7 21:47:40 2019 -0500
meson: Search for execinfo.h
Rather than checking __GLIBC__/__UCLIBC__ macros as a proxy for
execinfo.h presence, just check directly. This allows the build to work
on musl.
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Eric Anholt <eric at anholt.net>
Reviewed-by: Eric Engestrom <eric.engestrom at intel.com>
(cherry picked from commit 10e8d466011076a0453368cb976d9f6b06af0e94)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6dca27fce6637e7212fc18937b5e6d25c60c8ca2
Author: Jory Pratt <anarchy at gentoo.org>
Date: Mon Jun 10 11:48:02 2019 -0700
util: Heap-allocate 256K zlib buffer
The disk cache code tries to allocate a 256 Kbyte buffer on the stack.
Since musl only gives 80 Kbyte of stack space per thread, this causes a
trap.
See https://wiki.musl-libc.org/functional-differences-from-glibc.html#Thread-stack-size
(In musl-1.1.21 the default stack size has increased to 128K)
[mattst88]: Original author unknown, but I think this is small enough
that it is not copyrightable.
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Eric Anholt <eric at anholt.net>
Reviewed-by: Eric Engestrom <eric.engestrom at intel.com>
(cherry picked from commit fd7b7f14d857f96cf3b2e9d8405dbbfa30dc261a)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=334f0d3ead6d92d19a545171bfa509ab53e8df9b
Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date: Sat Jun 29 03:07:03 2019 +0200
radv: Only allocate supplied number of descriptors when variable.
Fixes: b5e04e9217b "radv: Support allocating variable size descriptor sets."
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111019
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
(cherry picked from commit d7e6541cc720a7d11d678adbeec7143b099127b0)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=515f4b2f20086abf8170c5b9dd56dd9cb19cccdb
Author: James Clarke <jrtc27 at jrtc27.com>
Date: Sat May 4 21:54:40 2019 +0100
meson: GNU/kFreeBSD has DRM/KMS and requires -D_GNU_SOURCE
This is a regression from the old autotools build system.
Acked-by: Eric Engestrom <eric.engestrom at intel.com>
Acked-by: Dylan Baker <dylan at pnwbakers.com>
(cherry picked from commit 7389bf9761ae8ed7f28c631954c5d263263f3882)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=05af010f77e187a318195cfacae491ca32fd6626
Author: Gert Wollny <gert.wollny at collabora.com>
Date: Thu Jun 13 09:26:01 2019 +0200
vl: Use CS composite shader only if TEX_LZ and DIV are supported
Enable the compute shader copositer only when TEX_LZ is supported by the driver.
v2: Also check whether DIV is supported.
https://bugs.freedesktop.org/show_bug.cgi?id=110783
Fixes: 9364d66cb7f7
gallium/auxiliary/vl: Add video compositor compute shader render
Signed-off-by: Gert Wollny <gert.wollny at collabora.com>
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
(cherry picked from commit 75d8b4e79542e08a42cab28378b830836f078eb5)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5cfbe55184fe0519583774b9fbe3f67913926484
Author: Gert Wollny <gert.wollny at collabora.com>
Date: Fri Jun 14 16:54:24 2019 +0200
gallium: Add CAP for opcode DIV
Not all drivers support TGSI_OPCODE_DIV, so we should have a cap to be able
to check this.
Signed-off-by: Gert Wollny <gert.wollny at collabora.com>
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
(cherry picked from commit 843723e2f7c79633cb0fe910b60684b8b2d289f6)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez at igalia.com>
Conflicts:
src/gallium/docs/source/screen.rst
src/gallium/include/pipe/p_defines.h
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d14939925e04e50f72601982da233cf875d96b37
Author: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Date: Wed Jun 19 05:09:35 2019 -0700
intel/compiler: don't use byte operands for src1 on ICL
The simulator complains about using byte operands, we also have
documentation telling us.
Note that add operations on bytes seems to work fine on HW (like ADD).
Using dwords operands with CMP & SEL fixes the following tests :
dEQP-VK.spirv_assembly.type.vec*.i8.*
v2: Drop the GLK changes (Matt)
Add validator tests (Matt)
v3: Drop GLK ref (Matt)
Don't mix float/integer in MAD (Matt)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli at intel.com> (v1)
Reviewed-by: Matt Turner <mattst88 at gmail.com>
BSpec: 3017
Cc: <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 5847de6e9afe12bd29ad694a76860a0575ab4747)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=38dab50ec8cf055f6ec8408af6880108db408fca
Author: Dylan Baker <dylan at pnwbakers.com>
Date: Fri Jun 28 16:36:38 2019 -0700
Revert "meson: Add support for using cmake for finding LLVM"
This reverts commit 5157a4276500c77e2210e853b262be1d1b30aedf.
There is a meson bug that causes llvm to always be statically linked,
which is obviously not what we want. I haven't had time to look into it
yet, but for now let's just revert it.
(cherry picked from commit 97c2c4546ca5d7c17f039dde9a6fd5957fb2364a)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=16ba6fecb24dd73146ac9a2c95391ba79e08df98
Author: Anuj Phogat <anuj.phogat at gmail.com>
Date: Wed Jun 26 14:27:01 2019 -0700
Revert "iris/icl: Add WA_2204188704 to disable pixel shader panic dispatch"
SLICE_COMMON_CHICKEN3 is a privileged register not accesible from userspace.
This patch silences a simulator warning about it.
We don't need to add this workaround in linux kernel as the WA description
says it's fixed on latest stepping.
This reverts commit 9c421d6b47e0c5f206959acd68814b63232946be.
Signed-off-by: Anuj Phogat <anuj.phogat at gmail.com>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
(cherry picked from commit d96cba775413ab357194af96b20c2107a0155bd8)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1bcdc5b4a603d3d7b6f6b1540f9d1bdffac114ff
Author: Anuj Phogat <anuj.phogat at gmail.com>
Date: Wed Jun 26 14:23:35 2019 -0700
Revert "anv/icl: Add WA_2204188704 to disable pixel shader panic dispatch"
SLICE_COMMON_CHICKEN3 is a privileged register not accesible from userspace.
This patch silences a simulator warning about it.
We don't need to add this workaround in linux kernel as the WA description
says it's fixed on latest stepping.
This reverts commit 2be60e0c73ed1555a919c5725cc0cab119a2b6de.
Signed-off-by: Anuj Phogat <anuj.phogat at gmail.com>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
(cherry picked from commit 387e43b52fa2c17ae1cd3f95c7578407d9c4ef95)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e17b17c2f584fd795af123baf0028ee1d70bb6ea
Author: Anuj Phogat <anuj.phogat at gmail.com>
Date: Wed Jun 26 14:19:53 2019 -0700
Revert "i965/icl: Add WA_2204188704 to disable pixel shader panic dispatch"
SLICE_COMMON_CHICKEN3 is a privileged register not accesible from userspace.
This patch silences a simulator warning about it.
We don't need to add this workaround in linux kernel as the WA description
says it's fixed on latest stepping.
This reverts commit 85ecd14ef6a084f5e82860de6dbc79870b335682.
Signed-off-by: Anuj Phogat <anuj.phogat at gmail.com>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
(cherry picked from commit 7746d4edef5332777bd0206e836617879ad8bb70)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ac3c9a4195bbca215af236628a011501ac3eba8f
Author: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
Date: Fri Jun 21 10:02:49 2019 +0200
radeon/uvd: fix calc_ctx_size_h265_main10
Left shift was applied twice.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110702
Reviewed-by: Leo Liu <leo.liu at amd.com>
Tested-by: <irherder at gmail.com>
Signed-off-by: Marek Olšák <marek.olsak at amd.com>
Cc: <mesa-stable at lists.freedesktop.org>
(cherry picked from commit c81c784a4a05f8a957a649d73c8194247de47b56)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=22b21623f3136951be120c1a48499868d4550001
Author: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
Date: Mon Jun 10 16:45:23 2019 +0200
mesa: delete framebuffer texture attachment sampler views
When a context is destroyed the destroy_tex_sampler_cb makes sure that all the
sampler views created by that context are destroyed.
This is done by walking the ctx->Shared->TexObjects hash table.
In a multiple context environment the texture can be deleted by a different context,
so it will be removed from the TexObjects table and will prevent the above mechanism
to work.
This can result in an assertion in st_save_zombie_sampler_view because the
sampler_view owns a reference to a destroyed context.
This issue occurs in blender 2.80.
This commit fixes this by explicitly releasing sampler_view created by the destroyed
context for all texture attachments.
Fixes: 593e36f956 (st/mesa: implement "zombie" sampler views (v2))
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110944
Signed-off-by: Marek Olšák <marek.olsak at amd.com>
(cherry picked from commit c37f03d46480e73d7c0cbfe93e91cd8d69d47220)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f6c959afaaef5d84dd86bee8b9a5e2a7e14f3182
Author: Eric Engestrom <eric.engestrom at intel.com>
Date: Mon Jun 24 17:47:15 2019 +0100
meson: bump required libdrm version to 2.4.81
dbb4457d9858fa977246 started using drmDevicesEqual(), which was
introduced in libdrm 2.4.81
We could either copy the function locally, or bump the required version.
Since the function is non-trivial and 2.4.81 is old enough already,
I suggesting the latter.
Fixes: dbb4457d9858fa977246 ("egl: add EGL_EXT_device_drm support")
Cc: Emil Velikov <emil.velikov at collabora.com>
Signed-off-by: Eric Engestrom <eric.engestrom at intel.com>
Reviewed-by: Dylan Baker <dylan at pnwbakers.com>
Reviewed-by: Emil Velikov <emil.velikov at collabora.com>
(cherry picked from commit 5819bc0e5c1802e0c0fb7544468d5ff635e1b268)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=adbf808e0c71d855257fdc3194462c39c5119aff
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date: Thu Jun 27 19:29:13 2019 +0200
radv: only enable VK_AMD_gpu_shader_{half_float,int16} on GFX9+
These two extensions are supported on GFX8 but the throughput
of 16-bit floats/integers is same as 32-bit. Also, shaderInt16
is only enabled on GFX9+ for the same reason, be more consistent.
This fixes a crash with Wolfenstein II because it expects
shaderInt16 to be enabled when VK_AMD_gpu_shader_half_float is
exposed. Note that AMDVLK only enables these extensions on GFX9+.
Cc: 19.1 <mesa-stable at lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
(cherry picked from commit ef1787dbc95e138b782fef1fcc93279ccf0e4910)
[Juan A. Suarez: resolve trivial conflicts]
Signed-off-by: Juan A. Suarez Romero <jasuarez at igalia.com>
Conflicts:
src/amd/vulkan/radv_extensions.py
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d6b1b9158ede567421d8c6d068429d080f69307e
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Jun 27 16:50:00 2019 -0700
gallium: Make util_copy_image_view handle shader_access
A while back, we added a new field, but failed to update the copier.
I believe iris is the only current user of the new field, and it hasn't
used the copier, so noone noticed.
Fixes: 8b626a22b24 st/mesa: Record shader access qualifiers for images
Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>
(cherry picked from commit 255c71ec07ec1f3af5b996d7b19717014ba946d3)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=211bedcf4d40eef6e80527facce4d58d1d06c8f9
Author: Nanley Chery <nanley.g.chery at intel.com>
Date: Mon May 20 14:50:23 2019 -0700
isl: Don't align phys_level0_sa by block dimension
Aligning phys_level0_sa by the compression block dimension prior to
mipmap layout causes the layout of compressed surfaces to differ from
the sampler's expectations in certain cases. The hardware docs agree:
From the BDW PRM, Vol. 5, Compressed Mipmap Layout,
The compressed mipmaps are stored in a similar fashion to
uncompressed mipmaps [...]
The following exceptions apply to the layout of compressed (vs.
uncompressed) mipmaps:
* [...]
* The dimensions of the mip maps are first determined by applying
the sizing algorithm presented in Non-Power-of-Two Mipmaps
above. Then, if necessary, they are padded out to compression
block boundaries.
The last bullet indicates that alignment should not be done for
calculating a miplevel's dimensions, but rather for determining miplevel
placement/padding. Comply with this text by removing the extra
alignment.
Fixes some fbo-generatemipmap-formats piglit failures on all tested
platforms (SNB-KBL).
v2:
- Note fixed platforms.
- Update some consumers via a helper function.
Cc: <mesa-stable at lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
(cherry picked from commit 02f6995d76c9fa0fdbc7a89013f4968970ab016e)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=eef57b818bd5332912941fed592f30e5631f7eab
Author: Nanley Chery <nanley.g.chery at intel.com>
Date: Thu May 23 13:44:52 2019 -0700
intel: Add and use helpers for level0 extent
Prepare for a bug fix by adding and using helpers which convert
isl_surf::logical_level0_px and isl_surf::phys_level0_sa to units of
surface elements.
v2:
- Update iris (Ken).
- Update anv.
Cc: <mesa-stable at lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
(cherry picked from commit fb1350c76f1525e6bd320cef62d55aff19ec3f05)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=97b43a8160cab9919ad853693e808e97b148a9a0
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed May 1 14:34:00 2019 -0700
iris: Enable PIPE_CAP_SURFACE_REINTERPRET_BLOCKS
This makes CompressedTexSubImage from a PBO source do proper GPU
rendering to upload instead of stalling to map the PBO source on
the CPU (then copying it on the CPU).
Thanks Bas Nieuwenhuizen for pointing out that Vulkan includes this
functionality, and to Jason Ekstrand for writing the code I adapted.
Vulkan only supports a single layer, however, and this code tries to
support multiple layers as long as it's miplevel 0.
Improves performance in Sid Meier's Civilization VI:
Average frame time (ms): -3.67423% +/- 1.46201% (n=5)
99th percentile frame time (ms): -5.09910% +/- 3.87874% (n=5)
(cherry picked from commit a032a9665f275085c825b54b62128ae90adba1c6)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=421aa4d1625c763c35b05a7103a409a2b190e0f5
Author: Dylan Baker <dylan at pnwbakers.com>
Date: Wed May 22 11:01:17 2019 -0700
meson: Add support for using cmake for finding LLVM
Meson has support for using cmake as a finder for some dependencies,
including LLVM. Using cmake has a lot of advantages: it needs less meson
maintenance to keep working (even for llvm updates); it works more
sanely for cross compiles (as llvm-config is a compiled binary not a
shell script). Meson 0.51.0 also has a new generic variable getter that
can be used to get information from either cmake, pkg-config, or
config-tools dependencies, which is needed for cmake. We continue to
support using llvm-config if you don't have cmake installed, or if cmake
cannot find a suitable version.
Fixes: 0d59459432cf077d768164091318af8fb1612500
("meson: Force the use of config-tool for llvm")
Reviewed-by: Eric Engestrom <eric.engestrom at intel.com>
(cherry picked from commit 5157a4276500c77e2210e853b262be1d1b30aedf)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a0a6df95b4ebe66735185c9923bf820a2b398e03
Author: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Date: Tue Jun 25 11:10:14 2019 +0300
intel/compiler: fix derivative on y axis implementation
This rewrites the ddy in EXECUTE_4 mode with a loop to make it more
obvious what is going on and also sets the group each of the 4 threads
in the groups are supposed to execute.
Fixes the following CTS tests :
dEQP-VK.glsl.derivate.dfdyfine.dynamic_*
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Co-Authored-by: Jason Ekstrand <jason at jlekstrand.net>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Fixes: 2134ea380033d5 ("intel/compiler/fs: Implement ddy without using align16 for Gen11+")
(cherry picked from commit 836225840c21dfb9ee77267e06e14bba781f69a1)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6fbe0eea2614e4748d18ba633f976e4ecfd943ab
Author: Sagar Ghuge <sagar.ghuge at intel.com>
Date: Mon Jun 24 15:10:53 2019 -0700
glsl: Fix round64 conversion function
Fix round64 function to handle round to nearest even cases specially
with positive and negative numbers with fraction part 0.5.
v2: 1) Simplify unused bits (Elie Tournier)
Fixes:
KHR-GL45.gpu_shader_fp64.builtin.round_dvec2
KHR-GL45.gpu_shader_fp64.builtin.round_dvec3
KHR-GL45.gpu_shader_fp64.builtin.round_dvec4
KHR-GL45.gpu_shader_fp64.builtin.roundeven_double
KHR-GL45.gpu_shader_fp64.builtin.roundeven_dvec2
KHR-GL45.gpu_shader_fp64.builtin.roundeven_dvec3
KHR-GL45.gpu_shader_fp64.builtin.roundeven_dvec4
Signed-off-by: Sagar Ghuge <sagar.ghuge at intel.com>
Reviewed-by: Elie Tournier <elie.tournier at collabora.com>
Acked-by: Anuj Phogat <anuj.phogat at gmail.com>
(cherry picked from commit 06807e1948f1bced9806b00908c892f1e3c3db5b)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3e1c46f233d680e313ad3458a32d540980c62018
Author: Sergii Romantsov <sergii.romantsov at globallogic.com>
Date: Tue Jun 18 17:07:21 2019 +0300
i965: leaking of upload-BO with push constants
In case of any enabled VS members from: uses_firstvertex,
uses_baseinstance, uses_drawid, uses_is_indexed_draw
leaks may happens.
Call gen6_upload_push_constants allocates
stage_stat->push_const_bo. It than takes pointer from
push_const_bo to draw_params_bo (in the call
brw_prepare_shader_draw_parameters by brw_upload_data)
and do reference which finally haven't got unreferenced.
Fixes leak:
136 bytes in 1 blocks are definitely lost in loss record 6 of 13
at 0x4C31B25: calloc (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so)
by 0xC2B64B7: bo_alloc_internal (brw_bufmgr.c:596)
by 0xC2B6748: brw_bo_alloc (brw_bufmgr.c:672)
by 0xC314BB3: brw_upload_space (intel_upload.c:88)
by 0xC2EBBC5: gen6_upload_push_constants (gen6_constant_state.c:155)
by 0xC9E4FA6: gen9_upload_vs_push_constants (genX_state_upload.c:3300)
by 0xC2E0EDA: check_and_emit_atom (brw_state_upload.c:540)
by 0xC2E0EDA: brw_upload_pipeline_state (brw_state_upload.c:659)
by 0xC2E0FF1: brw_upload_render_state (brw_state_upload.c:681)
by 0xC2C5D2D: brw_draw_single_prim (brw_draw.c:1052)
by 0xC2C62CB: brw_draw_prims (brw_draw.c:1175)
by 0xC488AD1: vbo_exec_vtx_flush (vbo_exec_draw.c:386)
by 0xC485270: vbo_exec_FlushVertices_internal (vbo_exec_api.c:652)
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Reported-by: Yevhenii Kolesnikov <yevhenii.kolesnikov at globallogic.com>
Signed-off-by: Sergii Romantsov <sergii.romantsov at globallogic.com>
(cherry picked from commit 1931c97a1dc71f8fb548a23247c2a0dd4793ad3c)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=77962816a51053cb8f9a24087427097e70e58017
Author: Jason Ekstrand <jason at jlekstrand.net>
Date: Tue Jun 25 14:26:56 2019 -0500
anv/descriptor_set: Only write texture swizzles if we have an image view
When immutable samplers are set we call write_image_view with a NULL
image view. This causes issues on IVB where we have to fake texture
swizzling.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110999
Fixes: d2aa65eb18 "anv: Emulate texture swizzle in the shader when..."
(cherry picked from commit 0a364a4a74e774030cde542ba8be90008b3f1211)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=970cc023b03537e4e8b1fb65287bfc0a504a6556
Author: Ville Syrjälä <ville.syrjala at linux.intel.com>
Date: Mon Jun 10 14:21:05 2019 +0300
anv/cmd_buffer: Reuse gen8 Cmd{Set, Reset}Event on gen7
Modern DXVK requires event support [1], but looks like it only
uses vkCmdSetEvent() + vkGetEventStatus(). So we can just
borrow the relevant code from gen8, leaving CmdWaitEvents still
unimplemented.
[1] https://github.com/doitsujin/dxvk/commit/8c3900c533d83d12c970b905183d17a1d3e8df1f
v2: Also move CmdWaitEvents into genX_cmd_buffer.c (Jason)
Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
(cherry picked from commit 6230bfeb656f1de598e8ed58cef548dc1c1781aa)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2e83a64f64d6310665cab59ebde4b61b70daa361
Author: Rob Clark <robdclark at chromium.org>
Date: Mon Jun 24 15:06:13 2019 -0700
freedreno/a5xx: fix batch leak in fd5 blitter path
Fixes: 3d198926a48 freedreno: use fd_bc_alloc_batch instead of fd_batch_create.
Signed-off-by: Rob Clark <robdclark at chromium.org>
(cherry picked from commit 927fb50727e6e6652c0e4ce300e098843ad12013)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f59881898f4899ec2959b1078456c2f538c106e7
Author: Ian Romanick <ian.d.romanick at intel.com>
Date: Thu Jun 20 15:48:48 2019 -0700
glsl: Don't increase the iteration count when there are no terminators
Incrementing the iteration count was intended to fix an off-by-one error
when the first terminator was superseded by a later terminator. If
there is no first terminator or later terminator, there is no off-by-one
error. Incrementing the loop count creates one. This can be seen in
loops like:
do {
if (something) {
// No breaks or continues here.
}
} while (false);
Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>
Tested-by: Abel Briggs <abelbriggs1 at hotmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110953
Fixes: 646621c66da ("glsl: make loop unrolling more like the nir unrolling path")
(cherry picked from commit ee1c69faddb3624ace6548dafaff50549a031380)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9171d2f19ebebcc33ceda49b152830252b2506ae
Author: Nataraj Deshpande <nataraj.deshpande at intel.com>
Date: Tue Jun 11 08:01:50 2019 -0700
anv: Add HAL_PIXEL_FORMAT_IMPLEMENTATION_DEFINED in vk_format
When HAL_PIXEL_FORMAT_IMPLEMENTATION_DEFINED is used, then the platform
gralloc module will select a format based on the usage flags provided by
the camera device and the other endpoint of the stream.
The patch fixes crash in vulkan when the test is run with camera stream
set to HAL_PIXEL_FORMAT_IMPLEMENTATION_DEFINED.
Test: android.graphics.cts.CameraVulkanGpuTest#testCameraImportAndRendering
on chromebook with camera HAL3.
v2: use AHARDWAREBUFFER_FORMAT_IMPLEMENTATION_DEFINED and take
AHARDWAREBUFFER_USAGE_CAMERA_MASK in to account (Gurchetan)
Fixes: f1654fa7e31 "anv/android: support creating images from external format"
Signed-off-by: Nataraj Deshpande <nataraj.deshpande at intel.com>
Signed-off-by: Gurchetan Singh <gurchetansingh at chromium.org>
Signed-off-by: Tapani Pälli <tapani.palli at intel.com>
Reviewed-by: Tapani Pälli <tapani.palli at intel.com>
Reviewed-by: Gurchetan Singh <gurchetansingh at chromium.org>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Acked-by: Jason Ekstrand <jason at jlekstrand.net>
(cherry picked from commit d94fca54203edc0b7fece6aa2dc8703ad4e93c79)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e9660d3c3f2f671b0a29e53be3c49e80f8c1eac0
Author: Eric Anholt <eric at anholt.net>
Date: Thu Jun 6 14:27:13 2019 -0700
freedreno: Fix up end range of unaligned UBO loads.
We need the constants uploaded to cover the NIR offset plus the size,
not the aligned-down start of our upload range plus the size. Fixes
mistaken UBO analysis with mat3 loads.
Fixes: 893425a607a6 ("freedreno/ir3: Push UBOs to constant file")
Reviewed-by: Kristian H. Kristensen <hoegsberg at google.com>
Reviewed-by: Rob Clark <robdclark at gmail.com>
(cherry picked from commit 56842d33d53f3ea76b9359e8ead2ea4487e62dc1)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0741463bb4885d08a5801d0086b91bca8505aa73
Author: Eric Anholt <eric at anholt.net>
Date: Thu Jun 6 12:19:06 2019 -0700
freedreno: Fix UBO load range detection on booleans.
NIR 1-bit bool dests will have a bit size of 1, and thus a calculated
"bytes" of 0. load_ubo is always loading from dwords in the source.
Fixes: 893425a607a6 ("freedreno/ir3: Push UBOs to constant file")
Reviewed-by: Rob Clark <robdclark at gmail.com>
(cherry picked from commit 5e7c96b95df0f2d792820a27b278a95a90893e4a)
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