Mesa (master): radv/gfx10: fix wrong emission of GE_CNTL

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: 4e38322dd83b8d3a7a107dabacf86739497db420
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4e38322dd83b8d3a7a107dabacf86739497db420

Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date:   Fri Jul 12 11:12:58 2019 +0200

radv/gfx10: fix wrong emission of GE_CNTL

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>

---

 src/amd/vulkan/radv_pipeline.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 9b68650fd36..7720990ba45 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -3461,7 +3461,7 @@ radv_pipeline_generate_hw_ngg(struct radeon_cmdbuf *ctx_cs,
 			       S_028838_INDEX_BUF_EDGE_FLAG_ENA(!radv_pipeline_has_tess(pipeline) &&
 			                                        !radv_pipeline_has_gs(pipeline)));
 
-	radeon_set_context_reg(ctx_cs, R_03096C_GE_CNTL,
+	radeon_set_uconfig_reg(ctx_cs, R_03096C_GE_CNTL,
 			       S_03096C_PRIM_GRP_SIZE(ngg_state->max_gsprims) |
 			       S_03096C_VERT_GRP_SIZE(ngg_state->hw_max_esverts) |
 			       S_03096C_BREAK_WAVE_AT_EOI(break_wave_at_eoi));