Mesa (master): iris: Refactor genxml macros and inlines into iris_genx_macros.h.
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Thu Jul 25 18:43:07 UTC 2019
Module: Mesa
Branch: master
Commit: 6c4c7b600dc2058c79f680e0caf86dd1d4524bc6
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6c4c7b600dc2058c79f680e0caf86dd1d4524bc6
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Fri Jul 12 00:50:19 2019 -0700
iris: Refactor genxml macros and inlines into iris_genx_macros.h.
This will let us put the genxml boilerplate in one place, before we
expand genxml to more files shortly. Like i965/genX_boilerplate.h.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
---
src/gallium/drivers/iris/Makefile.sources | 1 +
src/gallium/drivers/iris/iris_genx_macros.h | 122 ++++++++++++++++++++++++++++
src/gallium/drivers/iris/iris_state.c | 74 +----------------
src/gallium/drivers/iris/meson.build | 1 +
4 files changed, 125 insertions(+), 73 deletions(-)
diff --git a/src/gallium/drivers/iris/Makefile.sources b/src/gallium/drivers/iris/Makefile.sources
index 6e0c5e95685..62c4f2c5f49 100644
--- a/src/gallium/drivers/iris/Makefile.sources
+++ b/src/gallium/drivers/iris/Makefile.sources
@@ -42,6 +42,7 @@ IRIS_C_SOURCES = \
iris_fence.c \
iris_fence.h \
iris_formats.c \
+ iris_genx_macros.h \
iris_genx_protos.h \
iris_pipe.h \
iris_pipe_control.c \
diff --git a/src/gallium/drivers/iris/iris_genx_macros.h b/src/gallium/drivers/iris/iris_genx_macros.h
new file mode 100644
index 00000000000..b06b0dec5ae
--- /dev/null
+++ b/src/gallium/drivers/iris/iris_genx_macros.h
@@ -0,0 +1,122 @@
+/*
+ * Copyright © 2019 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+/**
+ * Macro and function definitions needed in order to use genxml.
+ *
+ * This should only be included in sources compiled per-generation.
+ */
+
+#include "iris_batch.h"
+
+#define __gen_address_type struct iris_address
+#define __gen_user_data struct iris_batch
+#define __gen_combine_address iris_combine_address
+
+static inline void *
+__gen_get_batch_dwords(struct iris_batch *batch, unsigned dwords)
+{
+ return iris_get_command_space(batch, dwords * sizeof(uint32_t));
+}
+
+static inline struct iris_address
+__gen_address_offset(struct iris_address addr, uint64_t offset)
+{
+ addr.offset += offset;
+ return addr;
+}
+
+static uint64_t
+__gen_combine_address(struct iris_batch *batch, void *location,
+ struct iris_address addr, uint32_t delta)
+{
+ uint64_t result = addr.offset + delta;
+
+ if (addr.bo) {
+ iris_use_pinned_bo(batch, addr.bo, addr.write);
+ /* Assume this is a general address, not relative to a base. */
+ result += addr.bo->gtt_offset;
+ }
+
+ return result;
+}
+
+#define __gen_address_type struct iris_address
+#define __gen_user_data struct iris_batch
+
+#define __genxml_cmd_length(cmd) cmd ## _length
+#define __genxml_cmd_length_bias(cmd) cmd ## _length_bias
+#define __genxml_cmd_header(cmd) cmd ## _header
+#define __genxml_cmd_pack(cmd) cmd ## _pack
+
+#include "genxml/genX_pack.h"
+#include "genxml/gen_macros.h"
+#include "genxml/genX_bits.h"
+
+#define _iris_pack_command(batch, cmd, dst, name) \
+ for (struct cmd name = { __genxml_cmd_header(cmd) }, \
+ *_dst = (void *)(dst); __builtin_expect(_dst != NULL, 1); \
+ ({ __genxml_cmd_pack(cmd)(batch, (void *)_dst, &name); \
+ _dst = NULL; \
+ }))
+
+#define iris_pack_command(cmd, dst, name) \
+ _iris_pack_command(NULL, cmd, dst, name)
+
+#define iris_pack_state(cmd, dst, name) \
+ for (struct cmd name = {}, \
+ *_dst = (void *)(dst); __builtin_expect(_dst != NULL, 1); \
+ __genxml_cmd_pack(cmd)(NULL, (void *)_dst, &name), \
+ _dst = NULL)
+
+#define iris_emit_cmd(batch, cmd, name) \
+ _iris_pack_command(batch, cmd, __gen_get_batch_dwords(batch, __genxml_cmd_length(cmd)), name)
+
+#define iris_emit_merge(batch, dwords0, dwords1, num_dwords) \
+ do { \
+ uint32_t *dw = __gen_get_batch_dwords(batch, num_dwords); \
+ for (uint32_t i = 0; i < num_dwords; i++) \
+ dw[i] = (dwords0)[i] | (dwords1)[i]; \
+ VG(VALGRIND_CHECK_MEM_IS_DEFINED(dw, num_dwords)); \
+ } while (0)
+
+
+/**
+ * iris_address constructor helpers:
+ *
+ * When using these to construct a CSO, pass NULL for \p bo, and manually
+ * pin the BO later. Otherwise, genxml's address handling will add the
+ * BO to the current batch's validation list at CSO creation time, rather
+ * than at draw time as desired.
+ */
+
+UNUSED static struct iris_address
+ro_bo(struct iris_bo *bo, uint64_t offset)
+{
+ return (struct iris_address) { .bo = bo, .offset = offset };
+}
+
+UNUSED static struct iris_address
+rw_bo(struct iris_bo *bo, uint64_t offset)
+{
+ return (struct iris_address) { .bo = bo, .offset = offset, .write = true };
+}
diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c
index cb601255be3..3fa8b075564 100644
--- a/src/gallium/drivers/iris/iris_state.c
+++ b/src/gallium/drivers/iris/iris_state.c
@@ -106,61 +106,7 @@
#include "iris_pipe.h"
#include "iris_resource.h"
-#define __gen_address_type struct iris_address
-#define __gen_user_data struct iris_batch
-
-#define ARRAY_BYTES(x) (sizeof(uint32_t) * ARRAY_SIZE(x))
-
-static uint64_t
-__gen_combine_address(struct iris_batch *batch, void *location,
- struct iris_address addr, uint32_t delta)
-{
- uint64_t result = addr.offset + delta;
-
- if (addr.bo) {
- iris_use_pinned_bo(batch, addr.bo, addr.write);
- /* Assume this is a general address, not relative to a base. */
- result += addr.bo->gtt_offset;
- }
-
- return result;
-}
-
-#define __genxml_cmd_length(cmd) cmd ## _length
-#define __genxml_cmd_length_bias(cmd) cmd ## _length_bias
-#define __genxml_cmd_header(cmd) cmd ## _header
-#define __genxml_cmd_pack(cmd) cmd ## _pack
-
-#define _iris_pack_command(batch, cmd, dst, name) \
- for (struct cmd name = { __genxml_cmd_header(cmd) }, \
- *_dst = (void *)(dst); __builtin_expect(_dst != NULL, 1); \
- ({ __genxml_cmd_pack(cmd)(batch, (void *)_dst, &name); \
- _dst = NULL; \
- }))
-
-#define iris_pack_command(cmd, dst, name) \
- _iris_pack_command(NULL, cmd, dst, name)
-
-#define iris_pack_state(cmd, dst, name) \
- for (struct cmd name = {}, \
- *_dst = (void *)(dst); __builtin_expect(_dst != NULL, 1); \
- __genxml_cmd_pack(cmd)(NULL, (void *)_dst, &name), \
- _dst = NULL)
-
-#define iris_emit_cmd(batch, cmd, name) \
- _iris_pack_command(batch, cmd, iris_get_command_space(batch, 4 * __genxml_cmd_length(cmd)), name)
-
-#define iris_emit_merge(batch, dwords0, dwords1, num_dwords) \
- do { \
- uint32_t *dw = iris_get_command_space(batch, 4 * num_dwords); \
- for (uint32_t i = 0; i < num_dwords; i++) \
- dw[i] = (dwords0)[i] | (dwords1)[i]; \
- VG(VALGRIND_CHECK_MEM_IS_DEFINED(dw, num_dwords)); \
- } while (0)
-
-#include "genxml/genX_pack.h"
-#include "genxml/gen_macros.h"
-#include "genxml/genX_bits.h"
+#include "iris_genx_macros.h"
#include "intel/common/gen_guardband.h"
#if GEN_GEN == 8
@@ -368,24 +314,6 @@ translate_wrap(unsigned pipe_wrap)
return map[pipe_wrap];
}
-static struct iris_address
-ro_bo(struct iris_bo *bo, uint64_t offset)
-{
- /* CSOs must pass NULL for bo! Otherwise it will add the BO to the
- * validation list at CSO creation time, instead of draw time.
- */
- return (struct iris_address) { .bo = bo, .offset = offset };
-}
-
-static struct iris_address
-rw_bo(struct iris_bo *bo, uint64_t offset)
-{
- /* CSOs must pass NULL for bo! Otherwise it will add the BO to the
- * validation list at CSO creation time, instead of draw time.
- */
- return (struct iris_address) { .bo = bo, .offset = offset, .write = true };
-}
-
/**
* Allocate space for some indirect state.
*
diff --git a/src/gallium/drivers/iris/meson.build b/src/gallium/drivers/iris/meson.build
index 9a3bb6e2260..b9b99a06a65 100644
--- a/src/gallium/drivers/iris/meson.build
+++ b/src/gallium/drivers/iris/meson.build
@@ -35,6 +35,7 @@ files_libiris = files(
'iris_fence.c',
'iris_fence.h',
'iris_formats.c',
+ 'iris_genx_macros.h',
'iris_genx_protos.h',
'iris_pipe.h',
'iris_pipe_control.c',
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