Mesa (master): intel/mi: Optimize away LOAD_REGISTER_REG from a register to itself

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: 79b8e3c260003a7ae4089a03d69aeb0ad50c8c0e
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=79b8e3c260003a7ae4089a03d69aeb0ad50c8c0e

Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Mon Apr  1 16:00:25 2019 -0700

intel/mi: Optimize away LOAD_REGISTER_REG from a register to itself

We might want to resolve something to be in a particular register,
so we can access it outside of the gen_mi framework...but it may already
be in that register, at which point there's no work to do.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>

---

 src/intel/common/gen_mi_builder.h | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/src/intel/common/gen_mi_builder.h b/src/intel/common/gen_mi_builder.h
index bb817ce930e..500893559c3 100644
--- a/src/intel/common/gen_mi_builder.h
+++ b/src/intel/common/gen_mi_builder.h
@@ -414,9 +414,11 @@ _gen_mi_copy_no_unref(struct gen_mi_builder *b,
       case GEN_MI_VALUE_TYPE_REG32:
       case GEN_MI_VALUE_TYPE_REG64:
 #if GEN_GEN >= 8 || GEN_IS_HASWELL
-         gen_mi_builder_emit(b, GENX(MI_LOAD_REGISTER_REG), lrr) {
-            lrr.SourceRegisterAddress = src.reg;
-            lrr.DestinationRegisterAddress = dst.reg;
+         if (src.reg != dst.reg) {
+            gen_mi_builder_emit(b, GENX(MI_LOAD_REGISTER_REG), lrr) {
+               lrr.SourceRegisterAddress = src.reg;
+               lrr.DestinationRegisterAddress = dst.reg;
+            }
          }
 #else
          unreachable("Cannot do reg <-> reg copy on IVB and earlier");