Mesa (staging/19.1): intel/compiler: Fix assertions in brw_alu3

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Module: Mesa
Branch: staging/19.1
Commit: cf6472e780855a99f2f054002f12480c0f9cc5dd
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=cf6472e780855a99f2f054002f12480c0f9cc5dd

Author: Sagar Ghuge <sagar.ghuge at intel.com>
Date:   Mon Apr 15 23:26:47 2019 -0700

intel/compiler: Fix assertions in brw_alu3

v2: Fix assertion for src1 (Ian Romanick)

Fixes: 3b967e17 (intel/compiler: Avoid false positive assertions)
Signed-off-by: Sagar Ghuge <sagar.ghuge at intel.com>
Suggested-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
(cherry picked from commit 3016756398c988e965ed189cfd99dc94ddb16626)

---

 src/intel/compiler/brw_eu_emit.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c
index 7b8783ee3d1..6cb4f7bdbf1 100644
--- a/src/intel/compiler/brw_eu_emit.c
+++ b/src/intel/compiler/brw_eu_emit.c
@@ -707,9 +707,9 @@ brw_alu3(struct brw_codegen *p, unsigned opcode, struct brw_reg dest,
    gen7_convert_mrf_to_grf(p, &dest);
 
    assert(dest.nr < 128);
-   assert(src0.file != BRW_IMMEDIATE_VALUE || src0.nr < 128);
-   assert(src1.file != BRW_IMMEDIATE_VALUE || src1.nr < 128);
-   assert(src2.file != BRW_IMMEDIATE_VALUE || src2.nr < 128);
+   assert(src0.file == BRW_IMMEDIATE_VALUE || src0.nr < 128);
+   assert(src1.file != BRW_IMMEDIATE_VALUE && src1.nr < 128);
+   assert(src2.file == BRW_IMMEDIATE_VALUE || src2.nr < 128);
    assert(dest.address_mode == BRW_ADDRESS_DIRECT);
    assert(src0.address_mode == BRW_ADDRESS_DIRECT);
    assert(src1.address_mode == BRW_ADDRESS_DIRECT);