Mesa (master): nir: Combine lower_fmod16/32 back into a single lower_fmod.
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Wed Jun 5 23:56:31 UTC 2019
Module: Mesa
Branch: master
Commit: c7d1b52a2c2bf8dc8066db8a7adb02241ccf9e2d
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c7d1b52a2c2bf8dc8066db8a7adb02241ccf9e2d
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Jun 3 13:18:55 2019 -0700
nir: Combine lower_fmod16/32 back into a single lower_fmod.
We originally had a single lower_fmod option. In commit 2ab2d2e5, Sam
split 32 and 64-bit lowering into separate flags, with the rationale
that some drivers might want different options there. This left 16-bit
unhandled, so Iago added a lower_fmod16 option in commit ca31df6f.
Now that lower_fmod64 is gone (in favor of nir_lower_doubles and
nir_lower_dmod), we re-combine lower_fmod16 and lower_fmod32 into a
single lower_fmod flag again. I'm not aware of any hardware which
need lowering for one bitsize and not the other.
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
---
src/compiler/nir/nir.h | 3 +--
src/compiler/nir/nir_opt_algebraic.py | 6 +++---
src/freedreno/ir3/ir3_nir.c | 4 ++--
src/gallium/drivers/freedreno/a2xx/ir2_nir.c | 2 +-
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 2 +-
src/gallium/drivers/panfrost/midgard/midgard_compile.h | 2 +-
src/intel/compiler/brw_compiler.c | 3 +--
7 files changed, 10 insertions(+), 12 deletions(-)
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index 794b1833436..e179481b8ea 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -2248,8 +2248,7 @@ typedef struct nir_shader_compiler_options {
bool lower_fpow;
bool lower_fsat;
bool lower_fsqrt;
- bool lower_fmod16;
- bool lower_fmod32;
+ bool lower_fmod;
/** Lowers ibitfield_extract/ubitfield_extract to ibfe/ubfe. */
bool lower_bitfield_extract;
/** Lowers ibitfield_extract/ubitfield_extract to bfm, compares, shifts. */
diff --git a/src/compiler/nir/nir_opt_algebraic.py b/src/compiler/nir/nir_opt_algebraic.py
index c0894ce42c9..b1c9b071464 100644
--- a/src/compiler/nir/nir_opt_algebraic.py
+++ b/src/compiler/nir/nir_opt_algebraic.py
@@ -771,9 +771,9 @@ optimizations.extend([
(('bcsel', ('ine', a, -1), ('ifind_msb', a), -1), ('ifind_msb', a)),
# Misc. lowering
- (('fmod at 16', a, b), ('fsub', a, ('fmul', b, ('ffloor', ('fdiv', a, b)))), 'options->lower_fmod16'),
- (('fmod at 32', a, b), ('fsub', a, ('fmul', b, ('ffloor', ('fdiv', a, b)))), 'options->lower_fmod32'),
- (('frem', a, b), ('fsub', a, ('fmul', b, ('ftrunc', ('fdiv', a, b)))), 'options->lower_fmod32'),
+ (('fmod at 16', a, b), ('fsub', a, ('fmul', b, ('ffloor', ('fdiv', a, b)))), 'options->lower_fmod'),
+ (('fmod at 32', a, b), ('fsub', a, ('fmul', b, ('ffloor', ('fdiv', a, b)))), 'options->lower_fmod'),
+ (('frem', a, b), ('fsub', a, ('fmul', b, ('ftrunc', ('fdiv', a, b)))), 'options->lower_fmod'),
(('uadd_carry at 32', a, b), ('b2i', ('ult', ('iadd', a, b), a)), 'options->lower_uadd_carry'),
(('usub_borrow at 32', a, b), ('b2i', ('ult', a, b)), 'options->lower_usub_borrow'),
diff --git a/src/freedreno/ir3/ir3_nir.c b/src/freedreno/ir3/ir3_nir.c
index 888ce5a70f6..23dabee1fb0 100644
--- a/src/freedreno/ir3/ir3_nir.c
+++ b/src/freedreno/ir3/ir3_nir.c
@@ -40,7 +40,7 @@ static const nir_shader_compiler_options options = {
.lower_flrp32 = true,
.lower_flrp64 = true,
.lower_ffract = true,
- .lower_fmod32 = true,
+ .lower_fmod = true,
.lower_fdiv = true,
.lower_isign = true,
.lower_ldexp = true,
@@ -65,7 +65,7 @@ static const nir_shader_compiler_options options_a6xx = {
.lower_flrp32 = true,
.lower_flrp64 = true,
.lower_ffract = true,
- .lower_fmod32 = true,
+ .lower_fmod = true,
.lower_fdiv = true,
.lower_isign = true,
.lower_ldexp = true,
diff --git a/src/gallium/drivers/freedreno/a2xx/ir2_nir.c b/src/gallium/drivers/freedreno/a2xx/ir2_nir.c
index 5cfb831b6e2..36f3a679ff6 100644
--- a/src/gallium/drivers/freedreno/a2xx/ir2_nir.c
+++ b/src/gallium/drivers/freedreno/a2xx/ir2_nir.c
@@ -32,7 +32,7 @@
static const nir_shader_compiler_options options = {
.lower_fpow = true,
.lower_flrp32 = true,
- .lower_fmod32 = true,
+ .lower_fmod = true,
.lower_fdiv = true,
.lower_fceil = true,
.fuse_ffma = true,
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
index 09f8c4135e5..527d5a8108a 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
@@ -905,7 +905,7 @@ static const nir_shader_compiler_options nir_options = {
.lower_fpow = false,
.lower_fsat = false,
.lower_fsqrt = false, // TODO: only before gm200
- .lower_fmod32 = true,
+ .lower_fmod = true,
.lower_bitfield_extract = false,
.lower_bitfield_extract_to_shifts = false,
.lower_bitfield_insert = false,
diff --git a/src/gallium/drivers/panfrost/midgard/midgard_compile.h b/src/gallium/drivers/panfrost/midgard/midgard_compile.h
index ba9e74adef3..2ee0dfbb1ae 100644
--- a/src/gallium/drivers/panfrost/midgard/midgard_compile.h
+++ b/src/gallium/drivers/panfrost/midgard/midgard_compile.h
@@ -91,7 +91,7 @@ static const nir_shader_compiler_options midgard_nir_options = {
.lower_flrp32 = true,
.lower_flrp64 = true,
.lower_ffract = true,
- .lower_fmod32 = true,
+ .lower_fmod = true,
.lower_fdiv = true,
.lower_idiv = true,
.lower_isign = true,
diff --git a/src/intel/compiler/brw_compiler.c b/src/intel/compiler/brw_compiler.c
index 9da549f7448..550b2e7d756 100644
--- a/src/intel/compiler/brw_compiler.c
+++ b/src/intel/compiler/brw_compiler.c
@@ -34,8 +34,7 @@
.lower_fdiv = true, \
.lower_scmp = true, \
.lower_flrp16 = true, \
- .lower_fmod16 = true, \
- .lower_fmod32 = true, \
+ .lower_fmod = true, \
.lower_bitfield_extract = true, \
.lower_bitfield_insert = true, \
.lower_uadd_carry = true, \
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