Mesa (master): virgl: Add driinfo file and tie it into the build
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Thu Jun 20 07:18:47 UTC 2019
Module: Mesa
Branch: master
Commit: cf800998af2b3d57beff972d7e154db6d0944b21
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cf800998af2b3d57beff972d7e154db6d0944b21
Author: Gert Wollny <gert.wollny at collabora.com>
Date: Wed Apr 10 14:03:00 2019 +0200
virgl: Add driinfo file and tie it into the build
Signed-off-by: Gert Wollny <gert.wollny at collabora.com>
Reviewed-by: Gurchetan Singh <gurchetansingh at chromium.org>
---
src/gallium/drivers/virgl/Android.mk | 11 +++++++++++
src/gallium/drivers/virgl/meson.build | 16 ++++++++++++++--
src/gallium/drivers/virgl/virgl_driinfo.h.in | 11 +++++++++++
3 files changed, 36 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/virgl/Android.mk b/src/gallium/drivers/virgl/Android.mk
index 0067dfa702e..577e5eab904 100644
--- a/src/gallium/drivers/virgl/Android.mk
+++ b/src/gallium/drivers/virgl/Android.mk
@@ -33,6 +33,17 @@ LOCAL_MODULE := libmesa_pipe_virgl
include $(GALLIUM_COMMON_MK)
include $(BUILD_STATIC_LIBRARY)
+GEN_DRIINFO_INPUTS := \
+ $(MESA_TOP)/src/gallium/auxiliary/pipe-loader/driinfo_gallium.h \
+ $(LOCAL_PATH)/virgl_driinfo.h.in
+
+MERGE_DRIINFO := $(MESA_TOP)/src/util/merge_driinfo.py
+
+$(intermediates)/virgl/virgl_driinfo.h: $(MERGE_DRIINFO) $(GEN_DRIINFO_INPUTS)
+ @mkdir -p $(dir $@)
+ @echo "Gen Header: $(PRIVATE_MODULE) <= $(notdir $(@))"
+ $(hide) $(MESA_PYTHON2) $(MERGE_DRIINFO) $(GEN_DRIINFO_INPUTS) > $@ || ($(RM) $@; false)
+
ifneq ($(HAVE_GALLIUM_VIRGL),)
GALLIUM_TARGET_DRIVERS += virtio_gpu
$(eval GALLIUM_LIBS += $(LOCAL_MODULE) libmesa_winsys_virgl libmesa_winsys_virgl_vtest)
diff --git a/src/gallium/drivers/virgl/meson.build b/src/gallium/drivers/virgl/meson.build
index 289203d0459..62e8155b66b 100644
--- a/src/gallium/drivers/virgl/meson.build
+++ b/src/gallium/drivers/virgl/meson.build
@@ -31,15 +31,27 @@ files_libvirgl = files(
'virgl_tgsi.c',
)
+virgl_driinfo_h = custom_target(
+ 'virgl_driinfo.h',
+ input : files(
+ '../../../util/merge_driinfo.py',
+ '../../auxiliary/pipe-loader/driinfo_gallium.h', 'virgl_driinfo.h.in'
+ ),
+ output : 'virgl_driinfo.h',
+ command : [prog_python, '@INPUT@'],
+ capture : true,
+)
+
libvirgl = static_library(
'virgl',
- files_libvirgl,
+ [ files_libvirgl, virgl_driinfo_h ],
c_args : c_vis_args,
include_directories : inc_common,
- dependencies : dep_libdrm,
+ dependencies : dep_libdrm
)
driver_virgl = declare_dependency(
+ sources : virgl_driinfo_h,
compile_args : '-DGALLIUM_VIRGL',
link_with : [libvirgl, libvirgldrm, libvirglvtest],
)
diff --git a/src/gallium/drivers/virgl/virgl_driinfo.h.in b/src/gallium/drivers/virgl/virgl_driinfo.h.in
new file mode 100644
index 00000000000..626e21c3648
--- /dev/null
+++ b/src/gallium/drivers/virgl/virgl_driinfo.h.in
@@ -0,0 +1,11 @@
+// DriConf options specific to virgl
+// To add a new tweak:
+// 1. Define the tweak in util/xmlpool/t_options.h and also add
+// the tweak name as define to virgl_protocol.h
+// 2. Add the tweak here with the appropriated default value
+// 3. Add the code to query the tweak in virgl_create_screen
+// 4. Add the code to send the tweek to the host in virgl_send_tweaks
+// 5. Implement the tweak in virglrenderer
+DRI_CONF_SECTION_MISCELLANEOUS
+DRI_CONF_SECTION_END
+
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