Mesa (master): radv: add radv_dcc_clear_level() helper

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Module: Mesa
Branch: master
Commit: fa903ba799f16a74d74876baaf45daf808f71d59
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=fa903ba799f16a74d74876baaf45daf808f71d59

Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date:   Thu Jun 20 09:17:34 2019 +0200

radv: add radv_dcc_clear_level() helper

For clearing only one level.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>

---

 src/amd/vulkan/radv_meta.h       |  3 +++
 src/amd/vulkan/radv_meta_clear.c | 30 +++++++++++++++++++++++++++---
 2 files changed, 30 insertions(+), 3 deletions(-)

diff --git a/src/amd/vulkan/radv_meta.h b/src/amd/vulkan/radv_meta.h
index 0cb31b9a7ec..5880064ff30 100644
--- a/src/amd/vulkan/radv_meta.h
+++ b/src/amd/vulkan/radv_meta.h
@@ -218,6 +218,9 @@ uint32_t radv_clear_fmask(struct radv_cmd_buffer *cmd_buffer,
 uint32_t radv_clear_dcc(struct radv_cmd_buffer *cmd_buffer,
 			struct radv_image *image,
 			const VkImageSubresourceRange *range, uint32_t value);
+uint32_t radv_dcc_clear_level(struct radv_cmd_buffer *cmd_buffer,
+			      const struct radv_image *image,
+			      uint32_t level, uint32_t value);
 uint32_t radv_clear_htile(struct radv_cmd_buffer *cmd_buffer,
 			  struct radv_image *image,
 			  const VkImageSubresourceRange *range, uint32_t value);
diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c
index c43ed6eeef1..dea0cae6d96 100644
--- a/src/amd/vulkan/radv_meta_clear.c
+++ b/src/amd/vulkan/radv_meta_clear.c
@@ -1334,6 +1334,32 @@ radv_clear_fmask(struct radv_cmd_buffer *cmd_buffer,
 }
 
 uint32_t
+radv_dcc_clear_level(struct radv_cmd_buffer *cmd_buffer,
+		     const struct radv_image *image,
+		     uint32_t level, uint32_t value)
+{
+	uint64_t offset = image->offset + image->dcc_offset;
+	uint32_t size;
+
+	if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9) {
+		/* Mipmap levels aren't implemented. */
+		assert(level == 0);
+		size = image->planes[0].surface.dcc_size;
+	} else {
+		const struct legacy_surf_level *surf_level =
+			&image->planes[0].surface.u.legacy.level[level];
+
+		/* If this is 0, fast clear isn't possible. */
+		assert(surf_level->dcc_fast_clear_size);
+
+		offset += surf_level->dcc_offset;
+		size = surf_level->dcc_fast_clear_size;
+	}
+
+	return radv_fill_buffer(cmd_buffer, image->bo, offset, size, value);
+}
+
+uint32_t
 radv_clear_dcc(struct radv_cmd_buffer *cmd_buffer,
 	       struct radv_image *image,
 	       const VkImageSubresourceRange *range, uint32_t value)
@@ -1341,9 +1367,7 @@ radv_clear_dcc(struct radv_cmd_buffer *cmd_buffer,
 	/* Mark the image as being compressed. */
 	radv_update_dcc_metadata(cmd_buffer, image, range, true);
 
-	return radv_fill_buffer(cmd_buffer, image->bo,
-				image->offset + image->dcc_offset,
-				image->planes[0].surface.dcc_size, value);
+	return radv_dcc_clear_level(cmd_buffer, image, 0, value);
 }
 
 uint32_t