Mesa (master): iris: Add maybe_flush calls to texture_barrier and memory_barrier

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Module: Mesa
Branch: master
Commit: 5e501ffeb245c3e2e4f93260495aaff960cd8876
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=5e501ffeb245c3e2e4f93260495aaff960cd8876

Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Thu Jun 20 09:50:56 2019 -0500

iris: Add maybe_flush calls to texture_barrier and memory_barrier

Otherwise, tests which loop on glMemoryBarrier may run us out of
batch space with piles of flushing.  (Ideally, we'd elide those bonus
PIPE_CONTROLs, but presumably this isn't that common of a case...)

Piglit's arb_pipeline_statistics_query-comp would hit this case after
some of the next patches remove other PIPE_CONTROLs with maybe_flushes.

---

 src/gallium/drivers/iris/iris_pipe_control.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/gallium/drivers/iris/iris_pipe_control.c b/src/gallium/drivers/iris/iris_pipe_control.c
index 65879b4968f..4633ac11134 100644
--- a/src/gallium/drivers/iris/iris_pipe_control.c
+++ b/src/gallium/drivers/iris/iris_pipe_control.c
@@ -161,6 +161,7 @@ iris_texture_barrier(struct pipe_context *ctx, unsigned flags)
    if (render_batch->contains_draw ||
        render_batch->cache.render->entries ||
        render_batch->cache.depth->entries) {
+      iris_batch_maybe_flush(render_batch, 48);
       iris_emit_pipe_control_flush(render_batch,
                                    "API: texture barrier (1/2)",
                                    PIPE_CONTROL_DEPTH_CACHE_FLUSH |
@@ -172,6 +173,7 @@ iris_texture_barrier(struct pipe_context *ctx, unsigned flags)
    }
 
    if (compute_batch->contains_draw) {
+      iris_batch_maybe_flush(compute_batch, 48);
       iris_emit_pipe_control_flush(compute_batch,
                                    "API: texture barrier (1/2)",
                                    PIPE_CONTROL_CS_STALL);
@@ -206,6 +208,7 @@ iris_memory_barrier(struct pipe_context *ctx, unsigned flags)
    for (int i = 0; i < IRIS_BATCH_COUNT; i++) {
       if (ice->batches[i].contains_draw ||
           ice->batches[i].cache.render->entries) {
+         iris_batch_maybe_flush(&ice->batches[i], 24);
          iris_emit_pipe_control_flush(&ice->batches[i], "API: memory barrier",
                                       bits);
       }