Mesa (master): virgl: add VIRGL_DEBUG_XFER

GitLab Mirror gitlab-mirror at kemper.freedesktop.org
Tue Jun 25 19:16:29 UTC 2019


Module: Mesa
Branch: master
Commit: 74786b3aa3e30d7920121e03914d5802e46d6c6c
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=74786b3aa3e30d7920121e03914d5802e46d6c6c

Author: Chia-I Wu <olvaffe at gmail.com>
Date:   Mon Jun 24 10:47:59 2019 -0700

virgl: add VIRGL_DEBUG_XFER

When set, do as requested and skip any transfer optimization.

Signed-off-by: Chia-I Wu <olvaffe at gmail.com>
Reviewed-By: Gert Wollny <gert.wollny at collabora.com>
Reviewed-By: Alexandros Frantzis <alexandros.frantzis at collabora.com>

---

 src/gallium/drivers/virgl/virgl_resource.c | 11 +++++++----
 src/gallium/drivers/virgl/virgl_screen.c   |  1 +
 src/gallium/drivers/virgl/virgl_screen.h   |  1 +
 3 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/src/gallium/drivers/virgl/virgl_resource.c b/src/gallium/drivers/virgl/virgl_resource.c
index 0659b38c692..5e372de7f15 100644
--- a/src/gallium/drivers/virgl/virgl_resource.c
+++ b/src/gallium/drivers/virgl/virgl_resource.c
@@ -117,8 +117,9 @@ virgl_resource_transfer_prepare(struct virgl_context *vctx,
     * PIPE_TRANSFER_DISCARD_RANGE are set.
     */
    if (res->u.b.target == PIPE_BUFFER &&
-         !util_ranges_intersect(&res->valid_buffer_range, xfer->base.box.x,
-            xfer->base.box.x + xfer->base.box.width)) {
+       !util_ranges_intersect(&res->valid_buffer_range, xfer->base.box.x,
+                              xfer->base.box.x + xfer->base.box.width) &&
+       likely(!(virgl_debug & VIRGL_DEBUG_XFER))) {
       flush = false;
       readback = false;
       wait = false;
@@ -127,8 +128,10 @@ virgl_resource_transfer_prepare(struct virgl_context *vctx,
    /* When the resource is busy but its content can be discarded, we can
     * replace its HW resource or use a staging buffer to avoid waiting.
     */
-   if (wait && (xfer->base.usage & (PIPE_TRANSFER_DISCARD_RANGE |
-                                    PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE))) {
+   if (wait &&
+       (xfer->base.usage & (PIPE_TRANSFER_DISCARD_RANGE |
+                            PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE)) &&
+       likely(!(virgl_debug & VIRGL_DEBUG_XFER))) {
       bool can_realloc = false;
       bool can_staging = false;
 
diff --git a/src/gallium/drivers/virgl/virgl_screen.c b/src/gallium/drivers/virgl/virgl_screen.c
index 08e7fbe8b54..9291c97906f 100644
--- a/src/gallium/drivers/virgl/virgl_screen.c
+++ b/src/gallium/drivers/virgl/virgl_screen.c
@@ -46,6 +46,7 @@ static const struct debug_named_value debug_options[] = {
    { "emubgra",   VIRGL_DEBUG_EMULATE_BGRA,        "Enable tweak to emulate BGRA as RGBA on GLES hosts"},
    { "bgraswz",   VIRGL_DEBUG_BGRA_DEST_SWIZZLE,   "Enable tweak to swizzle emulated BGRA on GLES hosts" },
    { "sync",      VIRGL_DEBUG_SYNC,                "Sync after every flush" },
+   { "xfer",      VIRGL_DEBUG_XFER,                "Do not optimize for transfers" },
    DEBUG_NAMED_VALUE_END
 };
 DEBUG_GET_ONCE_FLAGS_OPTION(virgl_debug, "VIRGL_DEBUG", debug_options, 0)
diff --git a/src/gallium/drivers/virgl/virgl_screen.h b/src/gallium/drivers/virgl/virgl_screen.h
index b466c632136..097bba61127 100644
--- a/src/gallium/drivers/virgl/virgl_screen.h
+++ b/src/gallium/drivers/virgl/virgl_screen.h
@@ -33,6 +33,7 @@ enum virgl_debug_flags {
    VIRGL_DEBUG_EMULATE_BGRA         = 1 << 2,
    VIRGL_DEBUG_BGRA_DEST_SWIZZLE    = 1 << 3,
    VIRGL_DEBUG_SYNC                 = 1 << 4,
+   VIRGL_DEBUG_XFER                 = 1 << 5,
 };
 
 extern int virgl_debug;




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