Mesa (master): intel/fs: Emit logical-not of operands on Gen8+
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Fri Mar 1 20:44:24 UTC 2019
Module: Mesa
Branch: master
Commit: 8eb36c912955407f9f1d7aba968fe9513cc8e325
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8eb36c912955407f9f1d7aba968fe9513cc8e325
Author: Ian Romanick <ian.d.romanick at intel.com>
Date: Thu Feb 9 15:20:04 2017 +0000
intel/fs: Emit logical-not of operands on Gen8+
On Gen8+ specifying negation of a logical operation such as AND actually
performs a logical-not. Take advantage of this to generate fewer
instructions.
v2: Major rebase. Use nir_src_as_alu_instr. Fix swizzle handling.
No changes on any pre-Gen8 platform.
Skylake and Broadwell had similar results. (Broadwell shown)
total instructions in shared programs: 15466902 -> 15466274 (<.01%)
instructions in affected programs: 1262953 -> 1262325 (-0.05%)
helped: 682
HURT: 4
helped stats (abs) min: 1 max: 5 x̄: 1.02 x̃: 1
helped stats (rel) min: 0.03% max: 2.40% x̄: 0.18% x̃: 0.04%
HURT stats (abs) min: 1 max: 62 x̄: 17.50 x̃: 3
HURT stats (rel) min: 0.03% max: 1.89% x̄: 0.53% x̃: 0.10%
95% mean confidence interval for instructions value: -1.10 -0.73
95% mean confidence interval for instructions %-change: -0.19% -0.15%
Instructions are helped.
total cycles in shared programs: 410996093 -> 410950440 (-0.01%)
cycles in affected programs: 144389048 -> 144343395 (-0.03%)
helped: 519
HURT: 51
helped stats (abs) min: 1 max: 1060 x̄: 104.46 x̃: 140
helped stats (rel) min: 0.01% max: 10.98% x̄: 0.34% x̃: 0.03%
HURT stats (abs) min: 1 max: 4060 x̄: 167.90 x̃: 22
HURT stats (rel) min: <.01% max: 8.20% x̄: 0.96% x̃: 0.25%
95% mean confidence interval for cycles value: -97.16 -63.02
95% mean confidence interval for cycles %-change: -0.32% -0.13%
Cycles are helped.
total spills in shared programs: 95311 -> 95329 (0.02%)
spills in affected programs: 881 -> 899 (2.04%)
helped: 0
HURT: 4
total fills in shared programs: 93629 -> 93634 (<.01%)
fills in affected programs: 794 -> 799 (0.63%)
helped: 1
HURT: 2
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
---
src/intel/compiler/brw_fs.h | 3 +++
src/intel/compiler/brw_fs_nir.cpp | 30 ++++++++++++++++++++++++------
2 files changed, 27 insertions(+), 6 deletions(-)
diff --git a/src/intel/compiler/brw_fs.h b/src/intel/compiler/brw_fs.h
index d39541bab77..df34c69663b 100644
--- a/src/intel/compiler/brw_fs.h
+++ b/src/intel/compiler/brw_fs.h
@@ -390,6 +390,9 @@ private:
nir_alu_instr *instr,
fs_reg *op,
bool need_dest);
+
+ void resolve_inot_sources(const brw::fs_builder &bld, nir_alu_instr *instr,
+ fs_reg *op);
};
/**
diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
index ad29351a95c..23b21f1d680 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -733,6 +733,27 @@ fs_visitor::prepare_alu_destination_and_sources(const fs_builder &bld,
}
void
+fs_visitor::resolve_inot_sources(const fs_builder &bld, nir_alu_instr *instr,
+ fs_reg *op)
+{
+ for (unsigned i = 0; i < 2; i++) {
+ nir_alu_instr *const inot_instr =
+ nir_src_as_alu_instr(&instr->src[i].src);
+
+ if (inot_instr != NULL && inot_instr->op == nir_op_inot &&
+ !inot_instr->src[0].abs && !inot_instr->src[0].negate) {
+ /* The source of the inot is now the source of instr. */
+ prepare_alu_destination_and_sources(bld, inot_instr, &op[i], false);
+
+ assert(!op[i].negate);
+ op[i].negate = true;
+ } else {
+ op[i] = resolve_source_modifiers(op[i]);
+ }
+ }
+}
+
+void
fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr)
{
struct brw_wm_prog_key *fs_key = (struct brw_wm_prog_key *) this->key;
@@ -1140,22 +1161,19 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr)
break;
case nir_op_ixor:
if (devinfo->gen >= 8) {
- op[0] = resolve_source_modifiers(op[0]);
- op[1] = resolve_source_modifiers(op[1]);
+ resolve_inot_sources(bld, instr, op);
}
bld.XOR(result, op[0], op[1]);
break;
case nir_op_ior:
if (devinfo->gen >= 8) {
- op[0] = resolve_source_modifiers(op[0]);
- op[1] = resolve_source_modifiers(op[1]);
+ resolve_inot_sources(bld, instr, op);
}
bld.OR(result, op[0], op[1]);
break;
case nir_op_iand:
if (devinfo->gen >= 8) {
- op[0] = resolve_source_modifiers(op[0]);
- op[1] = resolve_source_modifiers(op[1]);
+ resolve_inot_sources(bld, instr, op);
}
bld.AND(result, op[0], op[1]);
break;
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