Mesa (master): intel/fs: Fix extract_u8 of an odd byte from a 64-bit integer

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Module: Mesa
Branch: master
Commit: 55e6454d5e9dae6f8f29992af83f99217446da38
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=55e6454d5e9dae6f8f29992af83f99217446da38

Author: Ian Romanick <ian.d.romanick at intel.com>
Date:   Wed Feb 27 15:53:55 2019 -0800

intel/fs: Fix extract_u8 of an odd byte from a 64-bit integer

In the old code, we would generate the exact same instruction for
extract_u8(some_u64, 0) and extract_u8(some_u64, 1).  The mask-a-word
trick only works for even numbered bytes.

This fixes the (new) piglit test
tests/spec/arb_gpu_shader_int64/execution/fs-ushr-and-mask.shader_test.

v2: Use a SHR instead of an AND.  This saves an instruction compared to
using two moves.  Suggested by Jason.

Fixes: 6ac2d169019 ("i965/fs: Fix extract_i8/u8 to a 64-bit destination")
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

---

 src/intel/compiler/brw_fs_nir.cpp | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
index eb7ea7ece98..747529e72d8 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -1639,6 +1639,13 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr)
             fs_reg w_temp = bld.vgrf(BRW_REGISTER_TYPE_W);
             bld.MOV(w_temp, subscript(op[0], type, byte));
             bld.MOV(result, w_temp);
+         } else if (byte & 1) {
+            /* Extract the high byte from the word containing the desired byte
+             * offset.
+             */
+            bld.SHR(result,
+                    subscript(op[0], BRW_REGISTER_TYPE_UW, byte / 2),
+                    brw_imm_uw(8));
          } else {
             /* Otherwise use an AND with 0xff and a word type */
             bld.AND(result,