Mesa (bug-109980): i965: Disable ARB_fragment_shader_interlock for platforms prior to GEN9

[GitLab Mirror]

Module: Mesa
Branch: bug-109980
Commit: bc22a47cf080890444dda340a6e70021fca405e5
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=bc22a47cf080890444dda340a6e70021fca405e5

Author: Plamena Manolova <plamena.manolova at intel.com>
Date:   Tue Mar 12 21:25:36 2019 +0200

i965: Disable ARB_fragment_shader_interlock for platforms prior to GEN9

ARB_fragment_shader_interlock depends on memory fences to
ensure fragment ordering and this ordering guarantee is
only supported from GEN9 onwards.

Signed-off-by: Plamena Manolova <plamena.n.manolova at gmail.com>

---

 src/mesa/drivers/dri/i965/intel_extensions.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c b/src/mesa/drivers/dri/i965/intel_extensions.c
index d7080fb21b4..309cfeb9daf 100644
--- a/src/mesa/drivers/dri/i965/intel_extensions.c
+++ b/src/mesa/drivers/dri/i965/intel_extensions.c
@@ -254,7 +254,6 @@ intelInitExtensions(struct gl_context *ctx)
       ctx->Extensions.EXT_shader_samples_identical = true;
       ctx->Extensions.OES_primitive_bounding_box = true;
       ctx->Extensions.OES_texture_buffer = true;
-      ctx->Extensions.ARB_fragment_shader_interlock = true;
 
       if (can_do_pipelined_register_writes(brw->screen)) {
          ctx->Extensions.ARB_draw_indirect = true;
@@ -327,6 +326,7 @@ intelInitExtensions(struct gl_context *ctx)
       ctx->Extensions.KHR_blend_equation_advanced_coherent = true;
       ctx->Extensions.KHR_texture_compression_astc_ldr = true;
       ctx->Extensions.KHR_texture_compression_astc_sliced_3d = true;
+      ctx->Extensions.ARB_fragment_shader_interlock = true;
    }
 
    if (gen_device_info_is_9lp(devinfo))