Mesa (icl_wa_2204188704): 193 new commits
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Tue Mar 19 21:46:42 UTC 2019
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2be60e0c73ed1555a919c5725cc0cab119a2b6de
Author: Anuj Phogat <anuj.phogat at gmail.com>
Date: Thu Jan 24 14:46:02 2019 -0800
anv/icl: Add WA_2204188704 to disable pixel shader panic dispatch
Signed-off-by: Anuj Phogat <anuj.phogat at gmail.com>
Acked-by: Jason Ekstrand <jason at jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=85ecd14ef6a084f5e82860de6dbc79870b335682
Author: Anuj Phogat <anuj.phogat at gmail.com>
Date: Thu Jan 24 14:44:35 2019 -0800
i965/icl: Add WA_2204188704 to disable pixel shader panic dispatch
Signed-off-by: Anuj Phogat <anuj.phogat at gmail.com>
Acked-by: Jason Ekstrand <jason at jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b3aa37046bf852b370c76fe3f462731a144af4be
Author: Eric Engestrom <eric.engestrom at intel.com>
Date: Fri Mar 8 11:16:25 2019 +0000
gitlab-ci: drop most autotools builds
With autotools this close to being not supported anymore, let's not
waste half of the CI cycles on it. The default build will catch most
issues, and the rest can be tested by the old Travis.
Signed-off-by: Eric Engestrom <eric.engestrom at intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=17115da6add2b6dd2913423b4749f83fc878786a
Author: Eric Anholt <eric at anholt.net>
Date: Mon Mar 18 13:49:08 2019 -0700
v3d: Expose the dma-buf modifiers query.
This allows DRI3 to pick between UIF and raster according to whether we're
pageflipping or not and whether the pageflipping display can do UIF,
avoiding copies for the windowed/composited case that previously was
forced to linear.
Improves windowed glmark2 -b build:use-vbo=false performance by 30.7783%
+/- 13.1719% (n=3)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=bf6973199d186c93da35becc695db58fd3d1b4e5
Author: Eric Anholt <eric at anholt.net>
Date: Mon Mar 18 14:19:36 2019 -0700
v3d: Allow the UIF modifier with renderonly.
We ask the other side to make a buffer with the right number of pages, and
then just store the UIF in it. This avoids an extra silent copy of the
buffer from linear to UIF if it gets used for texturing (X11 copy-based
swapbuffers, GL compositors).
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=eb5903a90857e767233fc818c2c07abd92d79521
Author: Eric Anholt <eric at anholt.net>
Date: Mon Mar 18 14:25:06 2019 -0700
v3d: Always lay out shared tiled buffers with UIF_TOP set.
The samplers are already ready for this, we just needed to make sure that
layout chose UIF for level 0.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ab28dca0334746d1d6cb3f1b18550e3cbfb41d77
Author: Andres Gomez <agomez at igalia.com>
Date: Fri Feb 8 19:06:08 2019 +0200
Revert "glsl: relax input->output validation for SSO programs"
This reverts commit 1aa5738e666a9534c7e5b46f077327e6d647c64f.
This patch incorrectly asumed that for SSOs no inner interface
matching check was needed.
From the ARB_separate_shader_objects spec v.25:
" With separable program objects, interfaces between shader stages
may involve the outputs from one program object and the inputs
from a second program object. For such interfaces, it is not
possible to detect mismatches at link time, because the programs
are linked separately. When each such program is linked, all
inputs or outputs interfacing with another program stage are
treated as active. The linker will generate an executable that
assumes the presence of a compatible program on the other side of
the interface. If a mismatch between programs occurs, no GL error
will be generated, but some or all of the inputs on the interface
will be undefined."
This completes the fix from commit:
3be05dd2679 ("glsl/linker: don't fail non static used inputs without matching outputs")
Fixes: 1aa5738e666 ("glsl: relax input->output validation for SSO programs")
Cc: Tapani Pälli <tapani.palli at intel.com>
Cc: Timothy Arceri <tarceri at itsqueeze.com>
Cc: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
Cc: Ian Romanick <ian.d.romanick at intel.com>
Signed-off-by: Andres Gomez <agomez at igalia.com>
Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=422882e78f2cf0ab69ff4a58f3c9465fcb5fef0d
Author: Andres Gomez <agomez at igalia.com>
Date: Fri Jan 18 18:33:10 2019 +0200
glsl/linker: simplify xfb_offset vs xfb_stride overflow check
Current implementation uses a complicated calculation which relies in
an implicit conversion to check the integral part of 2 division
results.
However, the calculation actually checks that the xfb_offset is
smaller or a multiplier of the xfb_stride. For example, while this is
expected to fail, it actually succeeds:
"
...
layout(xfb_buffer = 2, xfb_stride = 12) out block3 {
layout(xfb_offset = 0) vec3 c;
layout(xfb_offset = 12) vec3 d; // ERROR, requires stride of 24
};
...
"
Fixes: 2fab85aaea5 ("glsl: add xfb_stride link time validation")
Cc: Timothy Arceri <tarceri at itsqueeze.com>
Signed-off-by: Andres Gomez <agomez at igalia.com>
Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3be05dd2679b2525ff80bac715d6ea097295c9ea
Author: Andres Gomez <agomez at igalia.com>
Date: Fri Dec 28 00:57:29 2018 +0200
glsl/linker: don't fail non static used inputs without matching outputs
If there is no Static Use of an input variable, the linker shouldn't
fail whenever there is no defined matching output variable in the
previous stage.
From page 47 (page 51 of the PDF) of the GLSL 4.60 v.5 spec:
" Only the input variables that are statically read need to be
written by the previous stage; it is allowed to have superfluous
declarations of input variables."
Now, we complete this exception whenever the input variable has an
explicit location. Previously, 18004c338f6 ("glsl: fail when a
shader's input var has not an equivalent out var in previous") took
care of the cases in which the input variable didn't have an explicit
location.
v2: do the location based interface matching check regardless on
whether it is a separable program or not (Ilia).
Fixes: 1aa5738e666 ("glsl: relax input->output validation for SSO programs")
Cc: Timothy Arceri <tarceri at itsqueeze.com>
Cc: Iago Toral Quiroga <itoral at igalia.com>
Cc: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
Cc: Tapani Pälli <tapani.palli at intel.com>
Cc: Ian Romanick <ian.d.romanick at intel.com>
Cc: Ilia Mirkin <imirkin at alum.mit.edu>
Signed-off-by: Andres Gomez <agomez at igalia.com>
Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=de1bc2d19a6e4b9081a79424ffc1cd082d27f6bd
Author: Andres Gomez <agomez at igalia.com>
Date: Fri Dec 28 12:24:53 2018 +0200
glsl/linker: always validate explicit location among inputs
Outputs are always validated when having explicit locations and we
were trusting its outcome to catch similar problems with the inputs
since, in case of having undefined outputs for existing inputs, we
would be already reporting a linker error.
However, consider this case:
" Shader stage n:
---------------
...
layout(location = 0) out float a;
...
Shader stage n+1:
-----------------
...
layout(location = 0) in float b;
layout(location = 0) in float c;
...
"
Currently, this won't report a linker error even though location
aliasing is happening for the inputs.
Therefore, we also need to validate the inputs independently from the
outcome of the outputs validation.
Cc: Timothy Arceri <tarceri at itsqueeze.com>
Cc: Iago Toral Quiroga <itoral at igalia.com>
Cc: Ilia Mirkin <imirkin at alum.mit.edu>
Signed-off-by: Andres Gomez <agomez at igalia.com>
Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a96093136bddfe17661f1de54228fe4b5618ba8a
Author: Andres Gomez <agomez at igalia.com>
Date: Thu Dec 20 03:09:57 2018 +0200
glsl: correctly validate component layout qualifier for dvec{3,4}
From page 62 (page 68 of the PDF) of the GLSL 4.50 v.7 spec:
" A dvec3 or dvec4 can only be declared without specifying a
component."
Therefore, using the "component" qualifier with a dvec3 or dvec4
should result in a compiling error.
v2: enhance the error message (Timothy).
Fixes: 94438578d21 ("glsl: validate and store component layout qualifier in GLSL IR")
Cc: Timothy Arceri <tarceri at itsqueeze.com>
Cc: Kenneth Graunke <kenneth at whitecape.org>
Signed-off-by: Andres Gomez <agomez at igalia.com>
Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cbfe31ccbe3eafcb5aeb74457e3b67641fd54ae1
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Tue Mar 19 10:18:49 2019 -0500
Revert "nir: const `nir_call_instr::callee`"
This reverts commit db57db5317e81fb4ce31bc294fdcc199db651542. When
building IR, nothing is really immutable and, since C has no concept of
constness propagating beyond the first pointer, we have to be vary
careful with how we use it. To just throw const into a function like
this is a lie.
Instead, we should just drop the unneeded const in spirv_to_nir which
this commit does along with the revert.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=43b6dd05f746f3c946bc6d259c69fad744989c89
Author: Eric Engestrom <eric.engestrom at intel.com>
Date: Tue Mar 19 07:59:07 2019 +0000
gitlab-ci: add clang build
`clang` has a different set of warnings and errors than `gcc`, so it's
useful to do at least a generic pass over Mesa with it.
Signed-off-by: Eric Engestrom <eric.engestrom at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=db57db5317e81fb4ce31bc294fdcc199db651542
Author: Eric Engestrom <eric.engestrom at intel.com>
Date: Tue Mar 19 09:04:26 2019 +0000
nir: const `nir_call_instr::callee`
Fixes: c95afe56a8033a87dca7 "nir/spirv: handle kernel function parameters"
Cc: Jason Ekstrand <jason at jlekstrand.net>
Signed-off-by: Eric Engestrom <eric.engestrom at intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Acked-by: Tapani Pälli <tapani.palli at intel.com>
Acked-by: Karol Herbst <kherbst at redhat.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=76f9ca6cf96e9969a9eeff772cfdee5890ae805e
Author: Rafael Antognolli <rafael.antognolli at intel.com>
Date: Tue Feb 26 11:56:32 2019 -0800
iris: Make intel_hiz_exec public.
Need to use it for fast clearing depth buffers.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9c63ec26eaff563ae3583638ceb4bd43fa9c32ba
Author: Rafael Antognolli <rafael.antognolli at intel.com>
Date: Wed Mar 13 16:56:55 2019 -0700
iris: Enable HiZ for multisampled depth surfaces.
Fix this check so that we can get a HiZ aux buffer for multisampled
surfaces as well. Also make sure we don't try to emit a sampler view
surface state for multisampled depth sufaces with HiZ enabled, as
the sampler can't HiZ for multisampled buffers and isl would assert.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d0ba326f238f9f2130847696c6c64bbb381f7471
Author: Karol Herbst <kherbst at redhat.com>
Date: Thu Jan 31 01:56:25 2019 +0100
nir/spirv: support physical pointers
v2: add load_kernel_input
Signed-off-by: Karol Herbst <kherbst at redhat.com>
squash! nir/spirv: support physical pointers
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c95afe56a8033a87dca71cc93191d448c2981cf7
Author: Karol Herbst <kherbst at redhat.com>
Date: Tue Nov 6 12:06:08 2018 +0100
nir/spirv: handle kernel function parameters
the idea here is to generate an entry point stub function wrapping around the
actual kernel function and turn all parameters into shader inputs with byte
addressing instead of vec4.
This gives us several advantages:
1. calling kernel functions doesn't differ from calling any other function
2. CL inputs match uniforms in most ways and we can just take advantage of most
of nir_lower_io
v2: move code into a seperate function
v3: verify the entry point got a name
fix minor typo
v4: make vtn_emit_kernel_entry_point_wrapper take the old entry point as an arg
Signed-off-by: Karol Herbst <kherbst at redhat.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0ccdf23a57ed8f2a8763f4187b440720fa912937
Author: Karol Herbst <kherbst at redhat.com>
Date: Fri Mar 15 16:06:22 2019 +0100
nir/lower_locals_to_regs: cast array index to 32 bit
local memory is too small to require 64 bit pointers, so cast the array index
to a 32 bit value to save up on 64 bit operations.
Signed-off-by: Karol Herbst <kherbst at redhat.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=44d32e62fb8d1fa9bf22c136aa41114d19b2d874
Author: Karol Herbst <kherbst at redhat.com>
Date: Mon Mar 5 15:04:32 2018 +0100
glsl: add cl_size and cl_alignment
Signed-off-by: Karol Herbst <kherbst at redhat.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund at collabora.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=659f333b3a4ff92ff985b168728ad37fe3d7e437
Author: Karol Herbst <kherbst at redhat.com>
Date: Sun Mar 4 19:06:24 2018 +0100
glsl: add packed for struct types
We need this for OpenCL kernels because we have to apply C rules for alignment
and padding inside structs and for this we also have to know if a struct is
packed or not.
v2: fix for kernel params
Signed-off-by: Karol Herbst <kherbst at redhat.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund at collabora.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b98955e128ca3470d89c925f58567f2369f8072a
Author: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Date: Fri Mar 15 23:25:55 2019 +0000
panfrost: Rewrite varying assembly
There are two stages to varying assembly in the command stream: creating
the varying buffers in the command stream, and creating the varying meta
descriptors (also in the command stream) linked to the aforementioned
buffers. The previous code for this was ad hoc and brittle, making some
invalid assumptions causing unmaintainable workarounds to pile up across
the driver (both compiler and command stream side).
This patch completely rewrites the varying assembly code. There's a
trivial performance penalty (we now memcpy the varying meta to the
command stream on draw, rather than on compile). That said, the
improvement in flexibility and clarity is well-worth it.
The motivator for these changes was support for gl_PointCoord (and
eventually point sprites for legacy GL), which was impossible to
implement with the old varying assembly code. With the new refactor,
it's super easy; support for gl_PointCoord is included with this patch.
All in all, I'm quite happy with how this turned out.
Signed-off-by: Alyssa Rosenzweig <alyssa at rosenzweig.io>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5e6d33a7b6cf7a9753fc8de167341da7f542b7cc
Author: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Date: Fri Mar 15 03:34:25 2019 +0000
panfrost: Replay more varying buffers
This is required for gl_PointCoord to show up on decodes.
Signed-off-by: Alyssa Rosenzweig <alyssa at rosenzweig.io>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b517e3684286e909eb624117ddcc4481020f31b4
Author: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Date: Fri Mar 15 03:21:27 2019 +0000
panfrost/decode: Respect primitive size pointers
Signed-off-by: Alyssa Rosenzweig <alyssa at rosenzweig.io>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4f89e4437c548f616b43c3a285434fdbb2959ba8
Author: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Date: Fri Mar 15 02:37:59 2019 +0000
panfrost: Disable PIPE_CAP_TGSI_TEXCOORD
I don't know why this was on to begin with...?
Signed-off-by: Alyssa Rosenzweig <alyssa at rosenzweig.io>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7c02c4f114b1a79ef9f5c7f725cdfee818b3977a
Author: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Date: Fri Mar 15 02:13:34 2019 +0000
panfrost: Fix primconvert check
In addition to fixing actual primconvert bugs, this prevents an infinite
loop when trying to draw POINTS.
Signed-off-by: Alyssa Rosenzweig <alyssa at rosenzweig.io>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=60d5b85261e95e2807b18a2a848099f0cb6ce9fc
Author: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Date: Fri Mar 15 02:07:55 2019 +0000
panfrost: Workaround buffer overrun with mip level
Mipmaps are still broken, but at least this way we don't crash on some
apps using mipmaps.
Signed-off-by: Alyssa Rosenzweig <alyssa at rosenzweig.io>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a777c3d7cb0a89f6c63a637e6db32cc1bf33b54c
Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date: Mon Mar 18 22:20:40 2019 +0100
radv: Use correct image view comparison for fast clears.
The if is actually returning true on success, enabling fast clears, so we
need to have the test succeed when the iview dimensions are right.
Fixes: d5400a5ec2a "radv: provide a helper for comparing an image extents."
Reviewed-by: Dave Airlie <airlied at redhat.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=493b3ada9b177e1294168e27cf4ab2b9886a33e4
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Wed Dec 12 10:54:26 2018 -0600
anv,radv: Implement VK_KHR_surface_capability_protected
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Reviewed-by: Eric Engestrom <eric at engestrom.ch>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ecb98c68988570806c239c7cc705c69a98aafc23
Author: Danylo Piliaiev <danylo.piliaiev at globallogic.com>
Date: Mon Mar 18 12:53:30 2019 +0200
anv: Treat zero size XFB buffer as disabled
Vulkan spec doesn't explicitly forbid zero size transform
feedback buffers.
Having zero size xfb caused SurfaceSize overflow and
triggered assert in debug build.
The only way to have zero size SO_BUFFER is to disable
SO_BUFFER as stated in hardware spec.
From SKL PRM, Vol 2a, "3DSTATE_SO_BUFFER":
"If set, stream output to SO Buffer is enabled,
if 3DSTATE_STREAMOUT::SO Function ENABLE is also enabled.
If clear, the SO Buffer is considered "not bound" and effectively
treated as a zero- length buffer for the purposes of SO output and
overflow detection. If an enabled stream's Stream to Buffer Selects
includes this buffer it is by definition an overflow condition.
That stream will cause no writes to occur,
and only SO_PRIM_STORAGE_NEEDED[<stream>] will increment."
Fixes: 36ee2fd61c8 "anv: Implement the basic form of VK_EXT_transform_feedback"
Signed-off-by: Danylo Piliaiev <danylo.piliaiev at globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f5b71b18ef600caa608f3885721603712d1a6d38
Author: Emil Velikov <emil.velikov at collabora.com>
Date: Mon Mar 18 16:02:27 2019 +0000
docs: update calendar, add news item and link release notes for 18.3.5
Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d4e26b36b230a4fb5f616c1afebedd2e8757aa29
Author: Emil Velikov <emil.velikov at collabora.com>
Date: Mon Mar 18 15:57:14 2019 +0000
docs: add sha256 checksums for 18.3.5
Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
(cherry picked from commit ec770b43b974cc86ce4bf996aa0616ceafa4e69c)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cb9fe1e89b2a24d01798d196b3dbc35efa9408d4
Author: Emil Velikov <emil.velikov at collabora.com>
Date: Mon Mar 18 15:45:53 2019 +0000
docs: add release notes for 18.3.5
Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
(cherry picked from commit 022708cb40a997e796f95d011a0e6c64a7333fe0)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d1aa37dfff2f7d81fc256c1717d9e5ba8dbc2e78
Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date: Sat Nov 17 18:39:24 2018 +0100
radv: Implement VK_EXT_host_query_reset.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Acked-by: Eric Engestrom <eric at engestrom.ch>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=887041c7630e72c85d31712f3377d801239f22e4
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Mon Mar 4 20:01:44 2019 -0600
anv: Implement VK_EXT_host_query_reset
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Reviewed-by: Eric Engestrom <eric at engestrom.ch>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=42ea88c673c74e5837b00a179fbcb9edeac88e4c
Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date: Sun Mar 17 18:21:28 2019 +0100
vulkan: Update the XML and headers to 1.1.104
Acked-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Acked-by: Eric Engestrom <eric at engestrom.ch>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=eb5cda1c3eca15790c46fcb7fd62408a7e0ba5f8
Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date: Sun Mar 17 20:26:07 2019 +0100
vulkan/util: Handle enums that are in platform-specific headers.
VkFullScreenExclusiveEXT comes from the win32 header. Mostly took
the logic from the entrypoint scripts:
1) If there is an ext that has it in the requires and has a platform,
take the guard for that platform.
2) Otherwise assume it is from the core headers.
Acked-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Eric Engestrom <eric at engestrom.ch>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5abe488d185461261275cb2f957871a04e03dab8
Author: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Date: Sun Mar 17 16:57:48 2019 +0000
vulkan: factor out wsi dependencies
In commit 530927d3f6a303d9 ("vulkan/util: generate instance/device
dispatch tables") we started generating instance dispatch tables some
of them (like wayland) require external headers.
This commit moves the dependencies up one level so that they apply the
whole vulkan directory. We use them for both the util & overlay layer.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Fixes: 530927d3f6a303 ("vulkan/util: generate instance/device dispatch tables")
Reviewed-by: Eric Engestrom <eric at engestrom.ch>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=791198a54b1182860e240d57f35cb02b1bcceca3
Author: Tapani Pälli <tapani.palli at intel.com>
Date: Tue Mar 5 09:24:16 2019 +0200
android: Build fixes for OMR1
Some of the header file locations are changed between Android
versions (when VNDK is used), patch makes sure we get all the
required headers.
v2: cleanups, put SDK version checks in all places (Tapani)
Signed-off-by: Tapani Pälli <tapani.palli at intel.com>
Signed-off-by: Chen Lin Z <lin.z.chen at intel.com>
Tested-by: Clayton Craft <clayton.a.craft at intel.com>
Acked-by: Eric Engestrom <eric.engestrom at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8ebc7dcb59a69763cc369af7c723e40a3fd29f7f
Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date: Sun Mar 17 03:18:29 2019 +0100
radv: Allow fast clears with concurrent queue mask for some layouts.
For VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL and
VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL we do not care about
the queue mask because
1) using these is only allowed on the gfx queue
2) transitions for these are only allowed on the gfx queue.
This enables some fast clears for Doom that uses
VK_SHARING_MODE_CONCURRENT.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d5974aeeae3d505114a6aa6b51b0c45c17e1baec
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Mar 18 00:51:18 2019 -0700
iris: Slightly better bounds on buffer sizes
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=836b47ca4e867f4df80e1559b4c9be2c881356ca
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Mar 18 00:18:32 2019 -0700
iris: Don't flush the batch for unsynchronized mappings
I messed this up when adding the GPU copy path.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a1cd0040b6d1ae3dbf9d792c5ab1aadbbf917bac
Author: Tapani Pälli <tapani.palli at intel.com>
Date: Fri Mar 15 12:32:09 2019 +0200
isl: fix automake build when sse41 is not supported
Fixes: 864cc419eb0a41882762 "intel/isl: move tiled_memcpy static libs from i965 to isl"
Cc: mesa-stable at lists.freedesktop.org
Reported-by: Milav Soni <milav.soni at teqdiligent.com>
Signed-off-by: Tapani Pälli <tapani.palli at intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f7332fbc08c18b2f2b65b28873d6dfddb5f02568
Author: Brian Paul <brianp at vmware.com>
Date: Fri Mar 8 15:36:04 2019 -0700
gallium/util: remove pipe_sampler_view_release()
It's no longer used.
Reviewed-by: Roland Scheidegger <sroland at vmware.com>
Reviewed-by: Neha Bhende <bhenden at vmware.com>
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich at web.de>
Reviewed-By: Jose Fonseca <jfonseca at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c473090b099bd2100363cb672e56edeb8579aeb5
Author: Brian Paul <brianp at vmware.com>
Date: Fri Mar 8 15:20:16 2019 -0700
i915g: remove calls to pipe_sampler_view_release()
As with previous patches for svga, llvmpipe, swr drivers.
Compile tested only.
Reviewed-by: Roland Scheidegger <sroland at vmware.com>
Reviewed-by: Neha Bhende <bhenden at vmware.com>
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich at web.de>
Reviewed-By: Jose Fonseca <jfonseca at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=768b770a86d025b0d118fc989f6cd46726653ac4
Author: Brian Paul <brianp at vmware.com>
Date: Fri Mar 8 15:19:02 2019 -0700
swr: remove call to pipe_sampler_view_release()
As with svga, llvmpipe drivers in previous patches.
Compile tested only.
Reviewed-by: Roland Scheidegger <sroland at vmware.com>
Reviewed-by: Neha Bhende <bhenden at vmware.com>
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich at web.de>
Reviewed-By: Jose Fonseca <jfonseca at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2ff2a5877454a5bcfb53cf3b0c07cda239f13f74
Author: Brian Paul <brianp at vmware.com>
Date: Fri Mar 8 14:08:13 2019 -0700
llvmpipe: stop using pipe_sampler_view_release()
This was used to avoid freeing a sampler view which was created by a
context that was already deleted. But the state tracker does not
allow that.
Reviewed-by: Roland Scheidegger <sroland at vmware.com>
Reviewed-by: Neha Bhende <bhenden at vmware.com>
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich at web.de>
Reviewed-By: Jose Fonseca <jfonseca at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a7afab7952c37da3144795f6ea81b7a31f5249e2
Author: Brian Paul <brianp at vmware.com>
Date: Fri Mar 8 14:02:53 2019 -0700
svga: stop using pipe_sampler_view_release()
This function was used in the past to avoid deleting a sampler view
for a context that no longer exists. But the Mesa state tracker
ensures that cannot happen. Use the standard refcounting function
instead.
Also, remove the code which checked for context mis-matches in
svga_sampler_view_destroy(). It's no longer needed since implementing
the zombie sampler view code in the state tracker.
Testing Done: google chrome, variety of GL demos/games
Reviewed-by: Roland Scheidegger <sroland at vmware.com>
Reviewed-by: Neha Bhende <bhenden at vmware.com>
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich at web.de>
Reviewed-By: Jose Fonseca <jfonseca at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=20de0359b53311cad322de8286448f2cbb34f475
Author: Brian Paul <brianp at vmware.com>
Date: Fri Mar 8 13:39:05 2019 -0700
st/mesa: stop using pipe_sampler_view_release()
In all instances here we can replace pipe_sampler_view_release(pipe,
view) with pipe_sampler_view_reference(view, NULL) because the views
in question are private to the state tracker context. So there's no
danger of freeing a sampler view with the wrong context.
Testing done: google chrome, misc GL demos, games
Reviewed-by: Roland Scheidegger <sroland at vmware.com>
Reviewed-by: Neha Bhende <bhenden at vmware.com>
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich at web.de>
Reviewed-By: Jose Fonseca <jfonseca at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=41c4c49463f65cd6c564b2a66634ba6572a824fb
Author: Brian Paul <brianp at vmware.com>
Date: Tue Mar 12 16:01:56 2019 -0600
st/mesa: implement "zombie" shaders list
As with the preceding patch for sampler views, this patch does
basically the same thing but for shaders. However, reference counting
isn't needed here (instead of calling cso_delete_XXX_shader() we call
st_save_zombie_shader().
The Redway3D Watch is one app/demo that needs this change. Otherwise,
the vmwgfx driver generates an error about trying to destroy a shader
ID that doesn't exist in the context.
Note that if PIPE_CAP_SHAREABLE_SHADERS = TRUE, then we can use/delete
any shader with any context and this mechanism is not used.
Tested with: google-chrome, google earth, Redway3D Watch/Turbine demos
and a few Linux games.
Reviewed-by: Roland Scheidegger <sroland at vmware.com>
Reviewed-by: Neha Bhende <bhenden at vmware.com>
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich at web.de>
Reviewed-By: Jose Fonseca <jfonseca at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=593e36f9561d3665cc12ed1fc8a07dd8612c004e
Author: Brian Paul <brianp at vmware.com>
Date: Tue Mar 12 09:13:00 2019 -0600
st/mesa: implement "zombie" sampler views (v2)
When st_texture_release_all_sampler_views() is called the texture may
have sampler views belonging to several contexts. If we unreference a
sampler view and its refcount hits zero, we need to be sure to destroy
the sampler view with the same context which created it.
This was not the case with the previous code which used
pipe_sampler_view_release(). That function could end up freeing a
sampler view with a context different than the one which created it.
In the case of the VMware svga driver, we detected this but leaked the
sampler view. This led to a crash with google-chrome when the kernel
module had too many sampler views. VMware bug 2274734.
Alternately, if we try to delete a sampler view with the correct
context, we may be "reaching into" a context which is active on
another thread. That's not safe.
To fix these issues this patch adds a per-context list of "zombie"
sampler views. These are views which are to be freed at some point
when the context is active. Other contexts may safely add sampler
views to the zombie list at any time (it's mutex protected). This
avoids the context/view ownership mix-ups we had before.
Tested with: google-chrome, google earth, Redway3D Watch/Turbine demos
a few Linux games. If anyone can recomment some other multi-threaded,
multi-context GL apps to test, please let me know.
v2: avoid potential race issue by always adding sampler views to the
zombie list if the view's context doesn't match the current context,
ignoring the refcount.
Reviewed-by: Roland Scheidegger <sroland at vmware.com>
Reviewed-by: Neha Bhende <bhenden at vmware.com>
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich at web.de>
Reviewed-By: Jose Fonseca <jfonseca at vmware.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e547a1ccb5aa65c1fb6777da2470bd6fd36e6ee9
Author: Brian Paul <brianp at vmware.com>
Date: Mon Mar 11 19:58:04 2019 -0600
docs: link to the meson_options.txt file gitlab.freedesktop.org
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=16fb82d189a9e2096d9fd47adac395b36090c9f0
Author: Brian Paul <brianp at vmware.com>
Date: Fri Mar 8 10:31:11 2019 -0700
docs: separate information for compiler selection and compiler options
Split up the "Environment Variables" section into "Compiler Options"
and "Compiler Specification". I think this makes the information
easier to find and understand.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=bfba0ecc1c847b4e5c5d24b89203ddcc6e672ae3
Author: Mauro Rossi <issor.oruam at gmail.com>
Date: Sun Mar 17 22:52:36 2019 +0100
android: nouveau: add support for nir
Add the necessary build rules for android, to avoid building errors.
Fixes: f014ae3 ("nouveau: add support for nir")
Signed-off-by: Mauro Rossi <issor.oruam at gmail.com>
Reviewed-by: Karol Herbst <kherbst at redhat.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=010570c8e31daa67b4419cee36c79f44b0bc557b
Author: Timothy Arceri <tarceri at itsqueeze.com>
Date: Sun Mar 17 21:04:20 2019 +1100
ac/nir_to_llvm: add assert to emit_bcsel()
nir to llvm assumes we have already split vectors to scalars via
nir_lower_alu_to_scalar().
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=de8ec6e1179d0cef559e19cac8918d47cebf1957
Author: Timothy Arceri <tarceri at itsqueeze.com>
Date: Thu Mar 14 11:02:11 2019 +1100
radeonsi/nir: call some more var optimisation passes
shader-db results (VEGA64):
Totals from affected shaders:
SGPRS: 5328912 -> 5329680 (0.01 %)
VGPRS: 2969308 -> 2969164 (-0.00 %)
Spilled SGPRs: 37921 -> 37917 (-0.01 %)
Spilled VGPRs: 32882 -> 29024 (-11.73 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 1400 -> 1200 (-14.29 %) dwords per thread
Code Size: 121126000 -> 121282784 (0.13 %) bytes
LDS: 1501 -> 1501 (0.00 %) blocks
Max Waves: 933188 -> 933229 (0.00 %)
Wait states: 0 -> 0 (0.00 %)
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=29179f58c6ba8099859ea25900214dbbd3814a92
Author: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de>
Date: Sat Mar 16 19:56:59 2019 +0100
vulkan/util: meson build - add wayland client include
Without this the build breaks with:
In file included from ../src/vulkan/util/vk_util.h:32,
from ../src/vulkan/util/vk_util.c:28:
../include/vulkan/vulkan.h:51:10: fatal error: wayland-client.h: No such file or
directory
#include <wayland-client.h>
^~~~~~~~~~~~~~~~~~
compilation terminated.
The above misses the include directory for wayland:
-I/usr/include/wayland
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de>
Cc: mesa-stable at lists.freedesktop.org
Reviewed-by: Eric Engestrom <eric.engestrom at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=58376c6b9be80c2cb74c7638d961d5af64f7143f
Author: Karol Herbst <kherbst at redhat.com>
Date: Thu Aug 16 22:11:47 2018 +0200
nv50ir/nir: move immediates before use
Signed-off-by: Karol Herbst <kherbst at redhat.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4ded1cdef9b488859e6aadb089eb3435ba73682f
Author: Karol Herbst <kherbst at redhat.com>
Date: Sat Jun 30 16:22:17 2018 +0200
nv50/ir/nir: handle user clip planes for each emitted vertex
v9: convert to C++ style comments
handle for tess eval shaders as well
Signed-off-by: Karol Herbst <kherbst at redhat.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b866012f7ba4bd83ad0e3904eae2116205bd256b
Author: Karol Herbst <kherbst at redhat.com>
Date: Wed Jan 10 00:35:47 2018 +0100
nv50/ir/nir: implement intrinsic shader_clock
v9: mark as fixed
Signed-off-by: Karol Herbst <kherbst at redhat.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c00d45cb457a68d89960bf003e1e2c9f3600d495
Author: Karol Herbst <kherbst at redhat.com>
Date: Sun Jan 7 00:35:37 2018 +0100
nv50/ir/nir: implement load_per_vertex_output
v4: use smarter getIndirect helper
use new getSlotAddress helper
v5: use loadFrom helper
v8: don't require C++11 features
Signed-off-by: Karol Herbst <kherbst at redhat.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9c44f4e04309802f7c4e82b5bb3c0ea645cf38a5
Author: Karol Herbst <kherbst at redhat.com>
Date: Mon Dec 25 23:15:03 2017 +0100
nv50/ir/nir: add memory barriers
v5: add more barrier intrinsics
Signed-off-by: Karol Herbst <kherbst at redhat.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=753ae68ca04b3f3e1ac0245d72e265d15b0fcaf3
Author: Karol Herbst <kherbst at redhat.com>
Date: Sat Dec 23 18:05:49 2017 +0100
nv50/ir/nir: implement images
v3: fix compiler warnings
v4: use loadFrom helper
v5: fix signed min/max
v6: set tex mask
add support for indirect image access
set cache mode
v7: make compatible with 884d27bcf688d36c3bbe01bceca525595add3b33
rework the whole deref thing to prepare for bindless
v8: port to deref instructions
don't require C++11 features
v9: implement MS images
rebase on master (image modifiers)
fix regressions due to variable src compnents
replace '(*it).' with 'it->'
convert to C++ style comments
Signed-off-by: Karol Herbst <kherbst at redhat.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2cdcb364f0f2419b9708b477eeec348b837626f8
Author: Karol Herbst <kherbst at redhat.com>
Date: Sat Dec 23 02:26:03 2017 +0100
nv50/ir/nir: implement ssbo intrinsics
v4: use loadFrom helper
v5: support indirect buffer access
v8: don't require C++11 features
Signed-off-by: Karol Herbst <kherbst at redhat.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8dca02955a3e6361a54edc442a66dd1b7f93d8b9
Author: Karol Herbst <kherbst at redhat.com>
Date: Fri Dec 22 18:01:38 2017 +0100
nv50/ir/nir: implement nir_intrinsic_load_ubo
v4: use loadFrom helper
v8: don't require C++11 features
Signed-off-by: Karol Herbst <kherbst at redhat.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1bef2b7bf524ab53d92456a0442662f80b76e30c
Author: Karol Herbst <kherbst at redhat.com>
Date: Thu Dec 21 16:30:25 2017 +0100
nv50/ir/nir: implement geometry shader nir_intrinsics
v4: use smarter getIndirect helper
use new getSlotAddress helper
use loadFrom helper
v8: don't require C++11 features
Signed-off-by: Karol Herbst <kherbst at redhat.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d2de40f07e61fdee168a54ca09fd6c3ac0dac6d7
Author: Karol Herbst <kherbst at redhat.com>
Date: Mon Dec 11 02:11:50 2017 +0100
nv50/ir/nir: implement variable indexing
We store those arrays in local memory and reserve some space for each of the
arrays. With NIR we could store those arrays packed, but we don't do that yet
as it causes MemoryOpt to generate unaligned memory accesses.
v3: use fixed size vec4 arrays until we fix MemoryOpt
v4: fix for 64 bit types
v5: use loadFrom helper
v8: don't require C++11 features
v9: convert to C++ style comments
Signed-off-by: Karol Herbst <kherbst at redhat.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fa361a3c1e7bf7b291de59c2386501fc13ebfed1
Author: Karol Herbst <kherbst at redhat.com>
Date: Wed Dec 20 17:06:03 2017 +0100
nv50/ir/nir: implement vote and ballot
v2: add vote_eq support
use the new subop intrinsic helper
add ballot
v3: add read_(first_)invocation
v8: handle vectorized intrinsics
don't require C++11 features
v9: lower_subgroups to 32 bit (produces less instructions)
use getSSA and getScratch instead of new_LValue
Signed-off-by: Karol Herbst <kherbst at redhat.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4dec7f81e0066554347461822b1fcbe6f355674a
Author: Karol Herbst <kherbst at redhat.com>
Date: Sat Dec 23 02:25:41 2017 +0100
nv50/ir/nir: add skeleton getOperation for intrinsics
v7: don't assert in default case for getSubOp
Signed-off-by: Karol Herbst <kherbst at redhat.com>
Reviewed-by: Pierre Moreau <pierre.morrow at free.fr>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=bb032d8b629cd42c8b7767d9f2156530b1b746f9
Author: Karol Herbst <kherbst at redhat.com>
Date: Tue Dec 12 18:07:01 2017 +0100
nv50/ir/nir: implement nir_instr_type_tex
a lot of those fields are not valid for a lot of tex ops. Not quite sure if
it's worth the effort to check for those or just keep it like that. It seems
to kind of work.
v2: reworked offset handling
add tex support with indirect R/S arguments
handle GLSL_SAMPLER_DIM_EXTERNAL
drop reference in convert(glsl_sampler_dim&, bool, bool)
fix tg4 component selection
v5: fill up coords args with scratch values if coords provided is less than TexTarget.getArgCount()
v7: prepare for bindless_texture support
v8: don't require C++11 features
v9: convert to C++ style comments
fix txf with a uniform constant 0 lod
Signed-off-by: Karol Herbst <kherbst at redhat.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=83cb790bf06e2dde4789b1497ac287944c70b818
Author: Karol Herbst <kherbst at redhat.com>
Date: Thu Dec 14 01:15:55 2017 +0100
nv50/ir/nir: implement nir_ssa_undef_instr
v2: use mkOp
v8: don't require C++11 features
Signed-off-by: Karol Herbst <kherbst at redhat.com>
Reviewed-by: Pierre Moreau <pierre.morrow at free.fr>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ad61f7e20d7e93833b81b016e224ad01c78ebad3
Author: Karol Herbst <kherbst at redhat.com>
Date: Wed Dec 13 22:14:03 2017 +0100
nv50/ir/nir: implement loading system values
v2: support more sys values
fixed a bug where for multi component reads all values ended up in x
v3: add load_patch_vertices_in
v4: add subgroup stuff
v5: add helper invocation
v6: fix loading 64 bit system values
v8: don't require C++11 features
v9: convert to C++ style comments
Signed-off-by: Karol Herbst <kherbst at redhat.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b05494c216fcb9bd6e02081d43d8d528fdb7f1da
Author: Karol Herbst <kherbst at redhat.com>
Date: Wed Dec 13 21:59:29 2017 +0100
nv50/ir/nir: implement intrinsic_discard(_if)
v9: use getSSA instead of new_LValue
Signed-off-by: Karol Herbst <kherbst at redhat.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9e68b7bef2d9c187a56c6132985568ee6dfbcabe
Author: Karol Herbst <kherbst at redhat.com>
Date: Mon Dec 11 16:21:06 2017 +0100
nv50/ir/nir: implement load_(interpolated_)input/output
v3: and load_output
v4: use smarter getIndirect helper
use new getSlotAddress helper
v5: don't use const_offset directly
fix for indirects
v6: add support for interpolateAt
v7: fix compiler warnings
add load_barycentric_sample
handle load_output for fragment shaders
v8: set info->prop.fp.readsSampleLocations for at_sample interpolation
don't require C++11 features
v9: convert to C++ style comments
Signed-off-by: Karol Herbst <kherbst at redhat.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6bc32bf65350daadf382932ad16071489b751a2b
Author: Karol Herbst <kherbst at redhat.com>
Date: Mon Dec 11 15:46:19 2017 +0100
nv50/ir/nir: implement nir_intrinsic_store_(per_vertex_)output
v3: add workaround for RA issues
indirects have to be multiplied by 0x10
fix indirect access
v4: use smarter getIndirect helper
use storeTo helper
v5: don't use const_offset directly
v8: don't require C++11 features
v9: convert to C++ style comments
handle clip planes correctly
Signed-off-by: Karol Herbst <kherbst at redhat.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8c257a0201d346e6685dcbb4d38f39779dba6238
Author: Karol Herbst <kherbst at redhat.com>
Date: Tue Dec 12 21:02:37 2017 +0100
nv50/ir/nir: implement nir_intrinsic_load_uniform
v2: use new getIndirect helper
fixes symbols for 64 bit types
v4: use smarter getIndirect helper
simplify address calculation
use loadFrom helper
v8: don't require C++11 features
Signed-off-by: Karol Herbst <kherbst at redhat.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6513c675ad31d192265a8286d712e8ae81c9f305
Author: Karol Herbst <kherbst at redhat.com>
Date: Tue Dec 12 21:05:30 2017 +0100
nv50/ir/nir: implement nir_alu_instr handling
v2: user bitfield_insert instead of bfi
rework switch helper macros
remove some lowering code (LoweringHelper is now used for this)
v3: add pack_half_2x16_split
add unpack_half_2x16_split_x/y
v5: replace first argument with nullptr in loadImm calls
prefer getSSA over getScratch
v8: fix setting precise modifier for first instruction inside a block
add guard in case no instruction gets inserted into an empty block
don't require C++11 features
v9: use CC_NE for integer compares
convert to C++ style comments
fix b2f for doubles
remove macros around nir ops to make it easier to grep them
add handling for fpow
Signed-off-by: Karol Herbst <kherbst at redhat.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c69b814728d01a2082fa5b68d9df3638576539e2
Author: Karol Herbst <kherbst at redhat.com>
Date: Thu Dec 21 13:33:23 2017 +0100
nv50/ir/nir: add skeleton for nir_intrinsic_instr
Signed-off-by: Karol Herbst <kherbst at redhat.com>
Reviewed-by: Pierre Moreau <pierre.morrow at free.fr>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8379dc300d744b4878f3d6e064bf65c5efa18e8c
Author: Karol Herbst <kherbst at redhat.com>
Date: Tue Dec 12 21:01:39 2017 +0100
nv50/ir/nir: implement nir_load_const_instr
v8: fix loading 8/16 bit constants
Signed-off-by: Karol Herbst <kherbst at redhat.com>
Reviewed-by: Pierre Moreau <pierre.morrow at free.fr>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=88c909e9a767b89bbee8d5072c93bec551b2b058
Author: Karol Herbst <kherbst at redhat.com>
Date: Fri Dec 15 17:40:15 2017 +0100
nv50/ir/nir: parse NIR shader info
v2: parse a few more fields
v3: add special handling for GL_ISOLINES
v8: set info->prop.fp.readsSampleLocations
don't require C++11 features
v9: replace '(*it).' with 'it->'
convert to C++ style comments
Signed-off-by: Karol Herbst <kherbst at redhat.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e8d9be40cbaf4922adec34a2e8106c04e2c7660d
Author: Karol Herbst <kherbst at redhat.com>
Date: Tue Jan 9 03:22:00 2018 +0100
nv50/ir/nir: add loadFrom and storeTo helpler
v8: don't require C++11 features
Signed-off-by: Karol Herbst <kherbst at redhat.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=39929a81645e3f27c3a65faf355f11826043e50b
Author: Karol Herbst <kherbst at redhat.com>
Date: Mon Dec 11 18:01:29 2017 +0100
nv50/ir/nir: run assignSlots
v2: add support for geometry shaders
set idx
add some missing mappings
fix for 64bit inputs/outputs
fix up some FP color output index messup
parse centroid flag
v3: fix arrays in outputs as well
fix input/ouput size calculation for tessellation shaders
v4: add getSlotAddress helper
fix for 64 bit typed inputs
v5: change getSlotAddress interface for easier use
fix sample inputs
fix slot counting for mat
v7: fix driver_location of images
v8: don't require C++11 features
v9: convert to C++ style comments
support VERT_ATTRIB_POINT_SIZE
add more error checking to slots
Signed-off-by: Karol Herbst <kherbst at redhat.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ccc4de0bdd0dd0e9118042084bc58bf50466911a
Author: Karol Herbst <kherbst at redhat.com>
Date: Mon Dec 18 03:57:06 2017 +0100
nv50/ir/nir: add nir type helper functions
v4: treat imul as unsigned
v5: remove pointless !!
v7: inot is unsigned as well
v8: don't require C++11 features
v9: convert to C++ style comments
improve formatting
print error in all cases where codegen doesn't support a given type
Signed-off-by: Karol Herbst <kherbst at redhat.com>
Acked-by: Pierre Moreau <pierre.morrow at free.fr>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7481abcd0ca41e0d801f2efd4b088a23e6a56892
Author: Karol Herbst <kherbst at redhat.com>
Date: Tue Dec 12 21:01:28 2017 +0100
nv50/ir/nir: track defs and provide easy access functions
v2: add helper function for indirects
v4: add new getIndirect overload for easier use
v5: use getSSA for ssa values
we can just create the values for unassigned registers in getSrc
v6: always create at least 32 bit values
v8: don't require C++11 features
v9: include unordered_map on supported stdlibs
replace '(*it).' with 'it->'
Signed-off-by: Karol Herbst <kherbst at redhat.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9298664a5f8e81af6f7cd8bc1493c6d5a6b4ddb4
Author: Karol Herbst <kherbst at redhat.com>
Date: Sun Dec 10 20:39:23 2017 +0100
nv50/ir/nir: run some passes to make the conversion easier
v2: add constant_folding
v6: print non final NIR only for verbose debugging
v8: add passes we will need for OpenCL compute shaders
v9: move type_size into anonymous namespace
convert to C++ style comments
lower bools to int32
Signed-off-by: Karol Herbst <kherbst at redhat.com>
Acked-by: Pierre Moreau <pierre.morrow at free.fr>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=78c5336ca9b37e59ecb3d8f44c988dc87d595b9b
Author: Karol Herbst <kherbst at redhat.com>
Date: Tue Apr 10 16:41:01 2018 +0200
nouveau: fix nir and TGSI shader cache collision
v9: rename variable to driver_flags
use constants for shader cache flags
Signed-off-by: Karol Herbst <kherbst at redhat.com>
Reviewed-by: Pierre Moreau <pierre.morrow at free.fr>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f014ae3c7cce504afe5d3c3de154f9cf9aea0821
Author: Karol Herbst <kherbst at redhat.com>
Date: Sun Dec 10 15:06:45 2017 +0100
nouveau: add support for nir
not all those nir options are actually required, it just made the work a
little easier.
v2: fix asserts
parse compute shaders
don't lower bitfield_insert
v3: fix memory leak
v4: don't lower fmod32
v5: set lower_all_io_to_temps to false
fix memory leak because we take over ownership of the nir shader
merge: use the lowering helper
v6: include TGSI debug header for proper assert call
add nv50 support
v7: fix Automake build
v8: free shader only for the set shader type
v9: check for IR type inside get_compiler_options
squash "nouveau: add env var to make nir default"
fix memory leak when creating compute shaders
use debug_get_bool_option as it is available in non debug builds
return failure if unsupported IR is encountered
don't lower fpow in nir
lower int 64 divmod inside nir to prevent crashes
Signed-off-by: Karol Herbst <kherbst at redhat.com>
Reviewed-by: Pierre Moreau <pierre.morrow at free.fr>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a211c92c4bf0582e5988a38d85cd6ef273e926da
Author: Karol Herbst <kherbst at redhat.com>
Date: Wed Jan 3 15:31:15 2018 +0100
nv50/ir: add lowering helper
if we start supporting multiple input IRs we might want to move lowering code
into a common place and keep the initial translation simplier.
This will also allows us to react on ISA changes more easily.
v5: also handle SAT
v6: rename type variables
fixed lowering of NEG
add lowering of NOT
v8: don't require C++11 features
Signed-off-by: Karol Herbst <kherbst at redhat.com>
Reviewed-by: Pierre Moreau <pierre.morrow at free.fr>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a0393010c4e654e13c62cb2f6f9eea066db19bc5
Author: Karol Herbst <kherbst at redhat.com>
Date: Tue Jan 2 19:02:30 2018 +0100
nv50/ir: move common converter code in base class
v2: remove TGSI related bits
Signed-off-by: Karol Herbst <kherbst at redhat.com>
Reviewed-by: Pierre Moreau <pierre.morrow at free.fr>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=bb50cb66f024c0e229313378ce6a872db78d02bf
Author: Karol Herbst <kherbst at redhat.com>
Date: Fri Dec 15 20:04:59 2017 +0100
nvc0: print the shader type when dumping headers
this makes debugging the shader header a little easier
Acked-by: Pierre Moreau <pierre.morrow at free.fr>
Signed-off-by: Karol Herbst <kherbst at redhat.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=213de3ea99e8d83c6a8b8c03ebdf6babd8de3011
Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date: Sat Mar 16 22:58:38 2019 +0100
radeonsi: Remove implicit const cast.
Fixes: b9e02fe138e "gallium: add pipe_grid_info::last_block"
Reviewed-by: Eric Engestrom <eric at engestrom.ch>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=158d45db0c2c953dc858b8746adf5ef9ccae9af0
Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date: Wed Mar 13 00:15:09 2019 +0100
gitlab-ci: Build turnip.
No autotools build to care about.
The half baked turnips param is kind of ugly, but felt like a waste
defining more variables for it now.
Reviewed-by: Eric Engestrom <eric at engestrom.ch>
Reviewed-by: Kristian H. Kristensen <hoegsberg at chromium.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=42ed6d9789f014b6ee18129a568b397e53c1e044
Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date: Wed Mar 13 00:38:02 2019 +0100
turnip: Deconflict vk_format_table regeneration
Avoids
src/freedreno/vulkan/meson.build:42:0: ERROR: Tried to create target "vk_format_table.c", but a target of that name already exists.
when building both radv and turnip.
Fixes: 26380b3a9f8 "turnip: Add driver skeleton (v2)"
Reviewed-by: Eric Engestrom <eric at engestrom.ch>
Reviewed-by: Kristian H. Kristensen <hoegsberg at chromium.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e1161d2ea7b47fc8d13114216ed02ac00b6caeba
Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date: Wed Mar 13 00:07:02 2019 +0100
turnip: Fix GCC compiles.
Apparently GCC does not consider static const variables to be
integer constants, and hence the array size and the static assert
result in compile failures.
Fixes: 4b9f967cd1a "turnip: add a more complete format table"
Reviewed-by: Eric Engestrom <eric at engestrom.ch>
Reviewed-by: Kristian H. Kristensen <hoegsberg at chromium.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d3386e73c5976ecec84821d17f05c2fd4b823880
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Thu Mar 14 12:58:16 2019 -0500
intel/nir: Lower array-deref-of-vector UBO and SSBO loads
This fixes a serious performance issue with DXVK:
https://github.com/doitsujin/dxvk/issues/937
This was caused by a recent change that to improve performance on RADV
which back-fired on ANV and killed performance for some apps:
https://github.com/doitsujin/dxvk/commit/e5a06d3f4a103a54cd4eb51970fedee405d1d698
Throwing in this bit of lowering lets us come along and CSE those UBO
loads (or copy-prop for SSBO load) and get one load where we previously
would have gotten several.
VkPipeline-db results on Kaby Lake:
total instructions in shared programs: 5115361 -> 5073185 (-0.82%)
instructions in affected programs: 1754333 -> 1712157 (-2.40%)
helped: 5331
HURT: 63
total cycles in shared programs: 2544501169 -> 2481144545 (-2.49%)
cycles in affected programs: 2531058653 -> 2467702029 (-2.50%)
helped: 9202
HURT: 4323
total loops in shared programs: 3340 -> 3331 (-0.27%)
loops in affected programs: 9 -> 0
helped: 9
HURT: 0
total spills in shared programs: 3246 -> 3053 (-5.95%)
spills in affected programs: 384 -> 191 (-50.26%)
helped: 10
HURT: 5
total fills in shared programs: 4626 -> 4452 (-3.76%)
fills in affected programs: 439 -> 265 (-39.64%)
helped: 10
HURT: 5
All of the shaders with hurt spilling were in Rise of the Tomb Raider
which also had shaders solidly helped in the spilling department. Not
shown in those results (because I've not had success dumping the
shaders) is Witcher 3 where this reduces spilling and improves over-all
perf by around 20-25%. There were no shader-db changes. Apparently,
this just isn't a pattern that happens in OpenGL.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
Cc: "19.0" mesa-stable at lists.freedesktop.org
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=35b8f6f40bb45dbffb04dd883ac6644300832981
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Mon Mar 11 18:47:39 2019 -0500
nir: Add a new pass to lower array dereferences on vectors
This pass was originally written for lowering TCS output reads and
writes but it is also applicable just about anything including UBOs,
SSBOs, and shared variables.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fe9a6c0f14aa3ca6dfb1c7480871c95838b5cf14
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Mon Mar 11 18:58:24 2019 -0500
nir/builder: Add a vector extract helper
This one's a tiny bit better than what we had in spirv_to_nir because it
emits a binary tree rather than a linear walk. It also doesn't leave
around unneeded bcsel instructions for a constant index and returns an
undef for constant OOB access.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9bb63e9a7c57f164a9d453ba33347d803e453144
Author: Gert Wollny <gert.wollny at collabora.com>
Date: Fri Mar 15 10:31:26 2019 +0100
softpipe: Enable PIPE_CAP_MIXED_COLORBUFFER_FORMATS
It seems softpipe actually supports this. This change enables the
following piglits as passing without regressions in the gpu test set:
gl-3.1-mixed-int-float-fbo
gl-3.1-mixed-int-float-fbo int_second
fbo-blending-format-quirks
Changes for deqp:
dEQP-GLES2.functional.fbo.completeness.attachment_combinations.rbo_tex_none_none QualityWarning -> Pass
dEQP-GLES2.functional.fbo.completeness.attachment_combinations.rbo_tex_none_rbo QualityWarning -> Pass
dEQP-GLES2.functional.fbo.completeness.attachment_combinations.rbo_tex_none_tex QualityWarning -> Pass
dEQP-GLES2.functional.fbo.completeness.attachment_combinations.rbo_tex_rbo_none QualityWarning -> Pass
dEQP-GLES2.functional.fbo.completeness.attachment_combinations.rbo_tex_tex_none QualityWarning -> Pass
dEQP-GLES2.functional.fbo.completeness.attachment_combinations.tex_rbo_none_none QualityWarning -> Pass
dEQP-GLES2.functional.fbo.completeness.attachment_combinations.tex_rbo_none_rbo QualityWarning -> Pass
dEQP-GLES2.functional.fbo.completeness.attachment_combinations.tex_rbo_none_tex QualityWarning -> Pass
dEQP-GLES2.functional.fbo.completeness.attachment_combinations.tex_rbo_rbo_none QualityWarning -> Pass
dEQP-GLES2.functional.fbo.completeness.attachment_combinations.tex_rbo_tex_none QualityWarning -> Pass
dEQP-GLES3.functional.fbo.completeness.samples.rbo0_rbo0_tex Fail -> Pass
dEQP-GLES3.functional.fbo.completeness.samples.rbo0_tex_none Fail -> Pass
dEQP-GLES3.functional.fbo.completeness.samples.rbo1_rbo1_rbo1 Fail -> Pass
dEQP-GLES3.functional.fragment_out.random.* NotSupported -> Pass
dEQP-GLES31.functional.shaders.builtin_functions.common.frexp.*_fragment Fail -> Pass
dEQP-GLES31.functional.shaders.builtin_functions.common.frexp.*_vertex Fail -> Pass
dEQP-GLES31.functional.shaders.builtin_functions.precision.frexp.*_fragment.* Fail -> Pass
dEQP-GLES31.functional.shaders.builtin_functions.precision.frexp.*_vertex.* Fail -> Pass
Signed-off-by: Gert Wollny <gert.wollny at collabora.com>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ca11f9263e4dcd541faaf8f4760de712581b5a1b
Author: Rob Clark <robdclark at gmail.com>
Date: Tue Feb 26 14:46:45 2019 -0500
freedreno/ir3/cp: fix ldib bug
Something that we didn't hit earlier because of the extra shr.b
Signed-off-by: Rob Clark <robdclark at gmail.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg at chromium.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=abfd572bd2faf58eb39722e76e19431c2242b06b
Author: James Zhu <James.Zhu at amd.com>
Date: Wed Mar 6 12:36:37 2019 -0500
gallium/auxiliary/vl: Change weave compute shader implementation
Use 2D_ARRARY instead of RECT to fetch texels for weave compute
shader.
Problem 2,3: Fixed interpolation issue with weave de-interlace
Fixes: 9364d66cb7f7 (Add video compositor compute shader render)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109646
Signed-off-by: James Zhu <James.Zhu at amd.com>
Acked-by: Leo Liu <leo.liu at amd.com>
Tested-by: Bruno Milreu <bmilreu at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a8ee07d83e7e0e6e8ae2b45bdeefd5c38a328c25
Author: James Zhu <James.Zhu at amd.com>
Date: Wed Mar 6 12:29:09 2019 -0500
gallium/auxiliary/vl: Change grid setting
Using draw area for grid setting instead of destination
buffer size.
Signed-off-by: James Zhu <James.Zhu at amd.com>
Acked-by: Leo Liu <leo.liu at amd.com>
Tested-by: Bruno Milreu <bmilreu at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=998dca4dbb2b2866c2bc7e42e757af48717ed854
Author: James Zhu <James.Zhu at amd.com>
Date: Wed Mar 6 12:01:07 2019 -0500
gallium/auxiliary/vl: Increase shader_params size
Increase shader_params size to pass sampler data to
compute shader during weave de-interlace.
Signed-off-by: James Zhu <James.Zhu at amd.com>
Acked-by: Leo Liu <leo.liu at amd.com>
Tested-by: Bruno Milreu <bmilreu at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b276e8358a726aaf010d277d361d5936450cd090
Author: Marek Olšák <marek.olsak at amd.com>
Date: Wed Feb 27 17:19:55 2019 -0500
omx: add a compute path in enc_LoadImage_common
Acked-by: Leo Liu <leo.liu at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=323e7be91cbed72a0978f5b784879b17155448ee
Author: Marek Olšák <marek.olsak at amd.com>
Date: Wed Feb 27 17:19:54 2019 -0500
omx: clean up enc_LoadImage_common
- add *pipe
- add documentation
Acked-by: Leo Liu <leo.liu at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b9e02fe138ef181f02fd739129517fbe70604af6
Author: Marek Olšák <marek.olsak at amd.com>
Date: Wed Feb 27 17:19:53 2019 -0500
gallium: add pipe_grid_info::last_block
The OpenMAX state tracker will use this.
RadeonSI is adapted to use pipe_grid_info::last_block instead of its
internal state.
Acked-by: Leo Liu <leo.liu at amd.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=34b3b92bbee1f68a9c121cd26e30e113c8cd39a8
Author: Alejandro Piñeiro <apinheiro at igalia.com>
Date: Thu Mar 14 11:02:52 2019 +0100
nir/xfb: move varyings info out of nir_xfb_info
When varyings was added we moved to use to dynamycally allocated
pointers, instead of allocating just one block for everything. That
breaks some assumptions of some vulkan drivers (like anv), that make
serialization and copying easier. And at the same time, varyings are
not needed for vulkan.
So this commit moves them out. Although it seems a little an overkill,
fixing the anv side would require a similar, or more, changes, so in
the end it is about to decide where do we want to put our effort.
v2: (from Jason review)
* Don't use a temp variable on the _create methods, just return
result of rzalloc_size
* Wrap some lines too long.
Fixes: cf0b2ad486c9 ("nir/xfb: adding varyings on nir_xfb_info and gather_info")
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d5befdbe4ad4523e58074063a3b619f389fb9f1f
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date: Fri Mar 15 10:36:00 2019 +0100
radv: always load 3 channels for formats that need to be shuffled
This fixes a rendering issue with Hellblade and DXVK.
Fixes: a66b186bebf ("radv: use typed buffer loads for vertex input fetches")
Reported-by: Philip Rebohle <philip.rebohle at tu-dortmund.de>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ebc15ecde5b37b6d0fa3adeffa49aae71eb8bd7e
Author: Mathias Fröhlich <mathias.froehlich at web.de>
Date: Thu Mar 14 05:58:43 2019 +0100
mesa: Add assert to _mesa_primitive_restart_index.
Make sure the inde_size parameter is meant to be in bytes.
Reviewed-by: Brian Paul <brianp at vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich at web.de>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d66faa54b2d7c8ad4ba6815a17d4d4e39b798c1f
Author: Mathias Fröhlich <mathias.froehlich at web.de>
Date: Fri Mar 1 09:27:54 2019 +0100
vbo: Fix GL_PRIMITIVE_RESTART_FIXED_INDEX in display list compiles.
The maximum value primitive restart index is different for each index data
type. Use the appropriate fixed restart index value.
Reviewed-by: Brian Paul <brianp at vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich at web.de>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a503f0562ae9b98802c89cb163f34a75cf240330
Author: Mathias Fröhlich <mathias.froehlich at web.de>
Date: Fri Mar 1 09:27:54 2019 +0100
vbo: Fix basevertex handling in display list compiles.
The standard requires that the primitive restart comparison happens before
the basevertex value is added. Do this now, drop a reference to the standard
why this happens at this place.
Reviewed-by: Brian Paul <brianp at vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich at web.de>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=94b64eb46257ea3a81e7198527357438a6762932
Author: Mathias Fröhlich <mathias.froehlich at web.de>
Date: Fri Mar 1 09:27:54 2019 +0100
mesa: Use mapping tools in debug prints.
Reviewed-by: Brian Paul <brianp at vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich at web.de>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a8183c1334e282f079d0387e1d8187fab57cf4fb
Author: Mathias Fröhlich <mathias.froehlich at web.de>
Date: Fri Mar 1 09:27:53 2019 +0100
mesa: Remove _ae_{,un}map_vbos and dependencies.
Since mapping and unmapping the buffer objects in a VAO is handled
directly from the VAO, this part of the _NEW_ARRAY state is no longer
used. So remove this part of array element state.
Reviewed-by: Brian Paul <brianp at vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich at web.de>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b89ae55a709808c0e1449d4045935c936e28958a
Author: Mathias Fröhlich <mathias.froehlich at web.de>
Date: Fri Mar 1 09:27:53 2019 +0100
mesa: Replace _ae_{,un}map_vbos with _mesa_vao_{,un}map_arrays
Due to the use of bitmaps, the _mesa_vao_{,un}map_arrays functions
should provide comparable runtime efficienty to the currently used
_ae_{,un}map_vbos functions. So use this functions and enable
further cleanup.
Reviewed-by: Brian Paul <brianp at vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich at web.de>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b43fae364f8ac27cf782fbbdd699aa9ec4ee6b89
Author: Mathias Fröhlich <mathias.froehlich at web.de>
Date: Fri Mar 1 09:27:53 2019 +0100
mesa: Use _mesa_array_element in dlist save.
Make use of the newly factored out _mesa_array_element function
in display list compilation. For now that duplicates out the
primitive restart logic. But that turns out to need a fix in
display list handling anyhow.
Reviewed-by: Brian Paul <brianp at vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich at web.de>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=80e319485a5ba653856c107e7c84ee60d28251b1
Author: Mathias Fröhlich <mathias.froehlich at web.de>
Date: Fri Mar 1 09:27:53 2019 +0100
mesa: Factor out _mesa_array_element.
The factored out function handles emitting the vertex attributes
at the given index. The now public accessible function gets used
in the following patches.
Reviewed-by: Brian Paul <brianp at vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich at web.de>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=85fd380878619ee03453b4e85ebf5b4e9648b496
Author: Mathias Fröhlich <mathias.froehlich at web.de>
Date: Fri Mar 1 09:27:53 2019 +0100
mesa: Implement helper functions to map and unmap a VAO.
Provide a set of functions that maps or unmaps all VBOs held
in a VAO. The functions will be used in the following patches.
v2: Update comments.
Reviewed-by: Brian Paul <brianp at vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich at web.de>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=efa4fc0ebd96b3fbcf30550494251307f11dc7b9
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Sun Mar 10 08:57:51 2019 -0500
st/mesa: Let NIR lower UBO and SSBO access when we have it
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=be2990d8fbcd5b4b450e7bfd2053b62d66153b8d
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Sat Mar 9 09:08:44 2019 -0600
i965: Stop setting LowerBuferInterfaceBlocks
Instead, we do UBO and SSBO deref lowering in NIR after we've given it a
chance to optimize SSBO access:
Shader-db results on Kaby Lake:
total instructions in shared programs: 15235775 -> 15235484 (<.01%)
instructions in affected programs: 14992 -> 14701 (-1.94%)
helped: 19
HURT: 20
total cycles in shared programs: 339220331 -> 339027307 (-0.06%)
cycles in affected programs: 79831981 -> 79638957 (-0.24%)
helped: 540
HURT: 602
total loops in shared programs: 4402 -> 4348 (-1.23%)
loops in affected programs: 186 -> 132 (-29.03%)
helped: 27
HURT: 0
total spills in shared programs: 23261 -> 23234 (-0.12%)
spills in affected programs: 38 -> 11 (-71.05%)
helped: 1
HURT: 0
total fills in shared programs: 31442 -> 31371 (-0.23%)
fills in affected programs: 98 -> 27 (-72.45%)
helped: 1
HURT: 0
LOST: 12
GAINED: 12
Most of the help and hurt in instruction counts was just churn caused by
re-ordering of optimizations and the fact that the NIR deref lowering
code is emitting slightly different instructions. Nothing was hurt by
more than three instructions and most things weren't helped by more than
four. The primary exception to this is one Car Chase shader:
shaders/non-free/gfxbench4/carchase/341.shader_test CS SIMD32: 1144 -> 821 (-28.23%)
There is also one compute shader in Manhattan 3.1 and a fragment shader
in the UE4 Shooter Game demo that now get a loop partially unrolled.
Those showed up in the results as hurt instructions but were manually
removed to get the results above.
The lost/gained was a dozen Car Chase shaders that went from SIMD8 to
SIMD16 thanks to improved register pressure:
shaders/non-free/gfxbench4/carchase/366.shader_test CS
shaders/non-free/gfxbench4/carchase/368.shader_test CS
shaders/non-free/gfxbench4/carchase/370.shader_test CS
shaders/non-free/gfxbench4/carchase/372.shader_test CS
shaders/non-free/gfxbench4/carchase/376.shader_test CS
shaders/non-free/gfxbench4/carchase/378.shader_test CS
shaders/non-free/gfxbench4/carchase/380.shader_test CS
shaders/non-free/gfxbench4/carchase/382.shader_test CS
shaders/non-free/gfxbench4/carchase/384.shader_test CS
shaders/non-free/gfxbench4/carchase/388.shader_test CS
shaders/non-free/gfxbench4/carchase/4.shader_test CS
shaders/non-free/gfxbench4/carchase/6.shader_test CS
Given how much it appeared to be improved, I ran Car Chase on my laptop.
Unfortunately, I wasn't able to see any measurable improvement. It
might be helped by 1-2% but it's in the noise. It does render correctly
as far as I can tell so the improvement is legitimate.
All of the loops that got delete were in dolphin uber shaders. I've had
no opportunity to test them for correctness or performance.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=810dde2a6b8179780e145e5f30142ca1deed6e67
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Sat Mar 9 10:12:46 2019 -0600
glsl/nir: Add a pass to lower UBO and SSBO access
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=77e5ec394e3eb63f8e92cd020e07f6fecd54f263
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Thu Mar 14 12:00:04 2019 -0500
glsl/nir: Handle unlowered SSBO atomic and array_length intrinsics
We didn't have any of these before because all NIR consumers always
called lower_ubo_references. Soon, we want to pass the derefs straight
through to NIR so we need to handle these intrinsics directly.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=76ba225184ed6e7f8cf0b427ae2ad81daa105ffb
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Sat Mar 9 09:40:09 2019 -0600
glsl/nir: Set explicit types on UBO/SSBO variables
We want to be able to use variables and derefs for UBO/SSBO access in
NIR. In order to do this, the rest of NIR needs to know the type layout
information.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8f3ab8aa7824a2f306b542a50b304675ce8f7e1a
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Mon Mar 11 14:53:31 2019 -0500
glsl: Don't lower vector derefs for SSBOs, UBOs, and shared
All of these are backed by some sort of memory so if you have multiple
threads writing to different components of the same vector at the same
time, the load-vec-store pattern that GLSL IR emits won't work. This
shouldn't affect any drivers today as they all call GLSL IR lowering
which lowers access to these variables to index+offset intrinsics before
we get to this point. However, NIR will start handling the derefs
itself and won't want the lowering.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3c11fc76543f381ce8ebb315def510978ef274a7
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Sun Mar 10 08:35:00 2019 -0500
nir/lower_io: Add a new buffer_array_length intrinsic and lowering
Reviewed-by: Kristian H. Kristensen <hoegsberg at chromium.org>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c8d42c8cf689fcaac1e0fd8477a8ddf269c4fe4d
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Sat Mar 9 10:10:37 2019 -0600
nir: Rename nir_address_format_vk_index_offset to not be vk
It's just a 32-bit index and offset. We're going to want to use it in
GL as well so stop talking about Vulkan.
Reviewed-by: Kristian H. Kristensen <hoegsberg at chromium.org>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=60af3a93e9c25e9d5661bfda215a0b07463fe146
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Sun Mar 10 17:41:02 2019 -0500
nir/deref: Consider COHERENT decorated var derefs as aliasing
If we get to two deref_var paths with different variables, we usually
know they don't alias. However, if both of the paths are marked
coherent, we don't have to worry about it.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8b073832ffab2f36338b85e6e67fbefb1b4f4ba9
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Sat Mar 9 09:06:27 2019 -0600
compiler/types: Add helpers to get explicit types for standard layouts
We also need to modify the current size/align helpers to not blow up
when they encounter an explicitly laid out type. Previously we
considered using the size/align helpers mutually exclusive with standard
layouts but now we just assert that they match.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5b2b1445660e260122773acea1c3b2032149d453
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Sun Mar 10 21:43:37 2019 -0500
compiler/types: Add a C wrapper to get full struct field data
Reviewed-by: Kristian H. Kristensen <hoegsberg at chromium.org>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ef4ca44780b4c146bab799837616ec90a1000688
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Sat Mar 9 10:22:39 2019 -0600
compiler/types: Add a new is_interface C wrapper
Reviewed-by: Alejandro Piñeiro <apinheiro at igalia.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg at chromium.org>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b315f6f82b8ae4ce64627dcae0e549f45cd320dd
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Sat Mar 9 15:05:25 2019 -0600
nir/validate: Allow 32-bit boolean load/store intrinsics
With UBOs and SSBOs we have boolean types but they're actually 32-bit
values. Make the validator a little less strict so that we can do a
32-bit load/store on boolean types. We're about to add a lowering pass
called gl_nir_lower_buffers which will lower boolean load/store
operations to 32-bit and insert i2b and b2i instructions to convert
to/from 1-bit booleans. We want that to be legal.
Reviewed-by: Kristian H. Kristensen <hoegsberg at chromium.org>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5d26f2d3d59d0f995eabacbe32870779d7730c53
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Sat Mar 9 13:06:28 2019 -0600
nir/validate: Only require bare types to match for copy_deref
If we want to be able to use copy_deref instructions on explicitly laid
out types, we have to be a little more flexible about what types we
allow. Instead, of requiring the types to exactly match, only require
the bare types to match.
Reviewed-by: Kristian H. Kristensen <hoegsberg at chromium.org>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2b76de9b5dd58c444c194d4c77ef9d9643ae5ca6
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Sun Mar 10 10:06:56 2019 -0500
nir/algebraic: Add a couple optimizations for iabs and ishr
Shader-db results on Kaby Lake:
total instructions in shared programs: 15225213 -> 15222365 (-0.02%)
instructions in affected programs: 43524 -> 40676 (-6.54%)
helped: 203
HURT: 0
Lots of shaders in Shadow Warrior had this pattern along with Deus Ex,
Civ, Shadow of Mordor, and several others.
Reviewed-by: Kristian H. Kristensen <hoegsberg at chromium.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0803bef00675ddd90ca9365b733b222dbb58c373
Author: Eric Anholt <eric at anholt.net>
Date: Tue Mar 12 15:18:43 2019 -0700
mesa/st: Fix leaks of TGSI tokens in VP variants.
Starting a glxgears and closing it, I was seeing a lot of leaked TGSI for
the fixed function VPs.
v2: drop unused delete_ir() arg.
Fixes: 3b4929ec6e64 ("st/mesa: Copy VP TGSI tokens if they exist, even for NIR shaders.")
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e0806c1ea079b1d78735290b0e24b02eb042b2c3
Author: Eric Anholt <eric at anholt.net>
Date: Tue Mar 12 17:07:16 2019 -0700
mesa/st: Make sure that prog_to_nir NIR gets freed.
GLSL NIR gets freed on relink by _mesa_delete_program(), but for ARB
programs we need to free the old NIR when PSN is used to set up new NIR in
the same gl_program. Additionally, set the base .nir field so that it
will get freed by _mesa_delete_program().
Fixes: 3d7611e9a6c6 ("st/nir: use NIR for asm programs")
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1ea42894c70f271c6ea958a9d3cc7ba8c5948c2e
Author: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Date: Wed Mar 13 05:01:43 2019 +0000
panfrost/midgard: Implement fpow
We have a native op for this, which was just found in a disassembly --
so instead of lowering, use it!
Signed-off-by: Alyssa Rosenzweig <alyssa at rosenzweig.io>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2eb65c21737e6b48107d056a6cb686421baf27d3
Author: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Date: Wed Mar 13 01:50:40 2019 +0000
panfrost: Compute viewport state on the fly
Previously, we were caching this incorrectly; there's no real reason to
given how variable it is (sensitive to changes in viewport, framebuffer
dimensions, and scissors) and how cheap it is to recompute. So, just do
it on the fly each draw.
Fixes glmark-es2 -bshadow and -brefract.
Signed-off-by: Alyssa Rosenzweig <alyssa at rosenzweig.io>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c6a725888f82d51fc70d7e1a2508afdb1b215064
Author: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Date: Wed Mar 13 01:31:30 2019 +0000
panfrost; Disable AFBC for depth buffers
For inexplicable reasons, the depth buffer is faster if kept as linear,
whereas the colour buffers are faster if AFBC. Given both code paths are
available, we'll choose the faster one of each (which also helps with
testing coverage).
Signed-off-by: Alyssa Rosenzweig <alyssa at rosenzweig.io>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=54e45d1d736954bd9f11d6825c7b242e16f8283b
Author: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Date: Wed Mar 13 00:53:34 2019 +0000
panfrost: Allocate extra data for depth buffer
It's not clear why the hardware "spills" a little bit, but if we don't
do this, we get MMU faults with linear depth buffers.
Signed-off-by: Alyssa Rosenzweig <alyssa at rosenzweig.io>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=79e474fa46d560e1f6bdab345f88f657513dc96f
Author: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Date: Wed Mar 13 00:53:18 2019 +0000
panfrost: Comment spelling fix
Signed-off-by: Alyssa Rosenzweig <alyssa at rosenzweig.io>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8c26890ac251526bf74777faf62b0c8b84b0c19f
Author: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Date: Tue Mar 12 23:16:37 2019 +0000
panfrost/mfbd: Respect per-job depth write flag
While a depth buffer may be supplied, it only needs to be written to if
the depth writemask is set for any draw AND if the depth buffer is not
immediately invalidated (as is the case for scanout). This refactors
panfrost_job to provide a depth write requirement, which is now
implemented for MFBD depth buffers.
Signed-off-by: Alyssa Rosenzweig <alyssa at rosenzweig.io>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9bf6024c6bccae34fb992db6ede6485c045cafde
Author: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Date: Tue Mar 12 22:49:33 2019 +0000
panfrost/mfbd: Implement linear depth buffers
This removes a clunky hack where the depth buffer was enabled during the
*clear*, instead of during depth buffer linking. That said, this does
not yet support writeback like AFBC depth buffers.
Signed-off-by: Alyssa Rosenzweig <alyssa at rosenzweig.io>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=23e01357235273994c5e7b8658d360c84fba30ff
Author: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Date: Tue Mar 12 22:42:16 2019 +0000
panfrost: Minor comment cleanup (version detection)
Signed-off-by: Alyssa Rosenzweig <alyssa at rosenzweig.io>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c119c282af2fd9ae7f6e4039af684a72470639a0
Author: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Date: Tue Mar 12 22:41:11 2019 +0000
panfrost: Remove staging MFBD
Same idea as the previous commit, but for the MFBD this time instead of
the SFBD.
Signed-off-by: Alyssa Rosenzweig <alyssa at rosenzweig.io>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d47f0907380d87946b1993163b3e9188c18b1d48
Author: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Date: Tue Mar 12 22:01:23 2019 +0000
panfrost: Remove staging SFBD for pan_context
The fragment framebuffer descriptor should not be a context entry;
rather, it should be constructed only at fragment time to keep analysis
tractable.
Signed-off-by: Alyssa Rosenzweig <alyssa at rosenzweig.io>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9dd84db7a5d7ae74f7fca835ae51fa6a88313d09
Author: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Date: Tue Mar 12 03:32:17 2019 +0000
panfrost: Break out fragment to SFBD/MFBD files
This substantially cleans up the corresponding logic at the expense of a
bit of code duplication; nevertheless, it's a net win since otherwise
incompatible hardware code is mixed confusingly.
Signed-off-by: Alyssa Rosenzweig <alyssa at rosenzweig.io>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4d1a356a570dfcec1dbde6790bcb9a3e7598c53e
Author: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Date: Thu Mar 14 04:14:37 2019 +0000
freedreno: Use shared drm_find_modifier util
Signed-off-by: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Reviewed-by: Rob Clark <robdclark at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=dd12142e3424fc2fb9b3e9b9d103b9e5bb9b03e5
Author: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Date: Thu Mar 14 04:16:07 2019 +0000
vc4: Use shared drm_find_modifier util
Signed-off-by: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cca270bb035a4dd8c7e94a56c9ca42068c66acb9
Author: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Date: Thu Mar 14 04:15:20 2019 +0000
v3d: Use shared drm_find_modifier util
Signed-off-by: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8a1ab9a166dd358f0e71a1cc98e8b6c20b5d8822
Author: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Date: Thu Mar 14 04:13:45 2019 +0000
util: Add a drm_find_modifier helper
This function is replicated across vc4/v3d/freedreno and is needed in
Panfrost; let's make this shared code.
v2: Supply generic util_array_contains_u64 version (Eric Engestrom). Add
missing stdbool.h include (Eric Anholt). Mark inline (Christian
Gmeiner).
Signed-off-by: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Reviewed-by: Eric Engestrom <eric.engestrom at intel.com>
Reviewed-by: Rob Clark <robdclark at gmail.com>
Reviewed-by: Eric Anholt <eric at anholt.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=16d108b502370b31cad7438a3e53b25554840f47
Author: Mark Janes <mark.a.janes at intel.com>
Date: Thu Dec 6 16:35:44 2018 -0800
mesa: add logging function for formatted string
Reviewed-by: Erik Faye-Lund <erik.faye-lund at collabora.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b8a1a3214afa3ac8f3b46ecce59bdd75a612c7e9
Author: Mark Janes <mark.a.janes at intel.com>
Date: Thu Dec 6 16:35:43 2018 -0800
mesa: rename logging functions to reflect that they format strings
In preparation for the definition of a function to log a formatted
string.
Reviewed-by: Erik Faye-Lund <erik.faye-lund at collabora.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=eb1a869a5d19bfd8a0d4099afd58f180997e4663
Author: Mark Janes <mark.a.janes at intel.com>
Date: Thu Dec 6 16:35:42 2018 -0800
mesa: properly report the length of truncated log messages
_mesa_log_msg must provide the length of the string passed into the
KHR_debug api. When the string formatted by _mesa_gl_vdebugf exceeds
MAX_DEBUG_MESSAGE_LENGTH, the length is incorrectly set to the number
of characters that would have been written if enough space had been
available.
Fixes: 30256805784450b8bb9d4dabfb56226271ca9d24
("mesa: Add support for GL_ARB_debug_output with dynamic ID allocation.")
Reviewed-by: Erik Faye-Lund <erik.faye-lund at collabora.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=162286eb7529d469f64b83e11ff896ac3549add6
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Wed Mar 13 17:27:39 2019 -0500
anv: Only set 3DSTATE_PS::VectorMaskEnable on gen8+
We don't set it on HSW and earlier in i965 and disabling it appears to
make derivatives somewhat more reliable.
Acked-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b63fe65bf680dac516e935f3b1608a7bc046a132
Author: Eric Engestrom <eric.engestrom at intel.com>
Date: Thu Mar 14 12:30:15 2019 +0000
travis: fix osx meson build
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3a2e93147f7fa4a6fd17313353113a33291c5ce0
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date: Thu Mar 14 14:27:03 2019 +0100
radv: always initialize HTILE when the src layout is UNDEFINED
HTILE should always be initialized when transitioning from
VK_IMAGE_LAYOUT_UNDEFINED to other image layouts. Otherwise,
if an app does a transition from UNDEFINED to GENERAL, the
driver doesn't initialize HTILE and it tries to decompress
the depth surface. For some reasons, this results in VM faults.
Cc: mesa-stable at lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107563
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=27b0661e30a8217dd94623b13232fd62a943b1eb
Author: Tomeu Vizoso <tomeu.vizoso at collabora.com>
Date: Thu Mar 14 15:20:50 2019 +0100
panfrost: Adapt to uapi changes
Two ioctls had wrong DRM_IO* flags.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso at collabora.com>
Reviewed-by: Rob Herring <robh at kernel.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=19ab08200179e71af42ce6e1b91f502e50f915b3
Author: Plamena Manolova <plamena.manolova at intel.com>
Date: Tue Mar 12 21:25:36 2019 +0200
i965: Disable ARB_fragment_shader_interlock for platforms prior to GEN9
ARB_fragment_shader_interlock depends on memory fences to
ensure fragment ordering and this ordering guarantee is
only supported from GEN9 onwards.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109980
Fixes: 939312702e35 "i965: Add ARB_fragment_shader_interlock support."
Signed-off-by: Plamena Manolova <plamena.n.manolova at gmail.com>
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0c3adaad22c34742058a9f52138cfd37778ef6df
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Wed Mar 13 15:35:28 2019 -0700
iris: Don't mutate box in transfer map code
Not mutating the boxes is arguably cleaner.
Split from a patch by Chris Wilson but reworked to use a pointer to the
original box rather than making a copy at all.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3b41175c22e14775656e13d11ca84cad83837b04
Author: Tapani Pälli <tapani.palli at intel.com>
Date: Wed Mar 13 12:13:09 2019 +0200
i965: remove scaling factors from P010, P012
Patch removes scaling factors introduced in 2a2e69f975b but leaves
option to use scaling in place as it could be useful with other upcoming
YUV formats.
We did this scaling because ffmpeg was shifting channel bits down, however
it seems this is not the right place as compositor wants to flip same
buffers directly to display as well and therefore bitshifting needs to be
done by the client when receiving frame from ffmpeg.
Now P0x formats are treated the same, e.g. P010 is same as P016 but with
lower 6 bits set to zeros.
Fixes: 2a2e69f975b "i965: add P0x formats and propagate required scaling factors"
Signed-off-by: Tapani Pälli <tapani.palli at intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=489bf2de237a190b966a412efda89d12d1daacde
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Tue Mar 12 22:55:14 2019 -0500
anv/pass: Flag the need for a RT flush for resolve attachments
Reviewed-by: Nanley Chery <nanley.g.chery at intel.com>
Cc: mesa-stable at lists.freedesktop.org
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=13099d4490a7445f370b3f895c2eb082cd7e2f0a
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Tue Mar 12 15:22:19 2019 -0500
anv: Stop using VK_TRUE/FALSE
We've been fairly inconsistent about this so we should really choose
whether we're going to use VK_TRUE/FALSE or the C boolean values. The
Vulkan #defines are set to 1 and 0 respectively so it's the same value
as C gives you when you cast a boolean expression to an integer. Since
there are several places where we set a VkBool32 to a C logical
expression, let's just embrace C booleans and stop using the VK defines.
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d6dc68e7b5b6f76a55037f6995dad101cc089d02
Author: Gurchetan Singh <gurchetansingh at chromium.org>
Date: Wed Mar 13 22:58:22 2019 +0000
virgl: use uint16_t mask instead of separate booleans
This should save some space.
Suggested-by: Erik Faye-Lund <erik.faye-lund at collabora.com>
Reviewed-by: Emil Velikov <emil.velikov at collabora.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=56717e13a65007a641ede756ea0b26a333dbc72b
Author: Albert Pal <liviuprodea at yahoo.com>
Date: Wed Mar 13 20:28:06 2019 +0000
Fix link release notes for 19.0.0.
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Reviewed-by: Dylan Baker <dylan at pnwbakers.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2b2b449dd146c43860c71eb05f0f02ee2ad69854
Author: Rafael Antognolli <rafael.antognolli at intel.com>
Date: Thu Feb 21 17:51:26 2019 -0800
iris: Enable auxiliary buffer support again
Now that we are properly resolving buffers before giving them to the
window system, let's enable aux support again.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1281368d02a22d08a892fbfda4cecc1219cde895
Author: Rafael Antognolli <rafael.antognolli at intel.com>
Date: Thu Mar 7 15:32:38 2019 -0800
iris: Convert RGBX to RGBA always.
In i965, we disable the use of RGBX formats, so the higher layers of
Mesa choose the equivalent RGBA format, and swizzle the alpha channel to
1.0.
However, Gallium won't do that. We need to explicitly convert it to
RGBA.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9159a5bbf882f94c48c21371049fef2d03d3dafd
Author: Rafael Antognolli <rafael.antognolli at intel.com>
Date: Thu Feb 28 11:08:32 2019 -0800
iris: Add resolve on iris_flush_resource.
The flush_resource hook is supposedly called when the resource content
needs to be made visible to external (okay, that's pretty vague). For
instance, it gets called before a surface gets handled to the window
system. So we need to resolve it if it's not resolved yet.
v2 (Ken):
- Check mod_info in iris_flush_resource instead of ISL_AUX_USAGE_NONE
- Drop my old broken resolve code from iris_resource_get_handle() now
that Rafael's got it hooked up in the right place.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=759ceda07e122e3b2cc7a5e44698f41accb5e92c
Author: Eduardo Lima Mitev <elima at igalia.com>
Date: Thu Feb 28 18:17:50 2019 +0100
ir3/lower_io_offsets: Try propagate SSBO's SHR into a previous shift instruction
While we lack value range tracking, this patch tries to 'manually' propogate
the division by 4 to calculate SSBO element-offset, into a possible previous
shift operation (shift left or right); checking that it is safe to do so.
This should help in cases like ie. when accessing a field in an array of
structs, where the offset is likely defined as base plus a multiplication
by a struct or array element size.
See dEQP test 'dEQP-GLES31.functional.ssbo.atomic.xor.highp_uint'
for an example of a shader that benefits from this.
Reviewed-by: Rob Clark <robdclark at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2e4525883f0744b0c8df9792ded597090a8ad987
Author: Eduardo Lima Mitev <elima at igalia.com>
Date: Tue Feb 26 14:07:04 2019 +0100
ir3/compiler: Enable lower_io_offsets pass and handle new SSBO intrinsics
These intrinsics have the offset in dwords already computed in the last
source, so the change here is basically using that instead of emitting
the ir3_SHR to divide the byte-offset by 4.
The improvement in shader stats is significant, of up to ~15% in
instruction count in some cases. Tested only on a5xx.
shader-db is unfortunately not very useful here because shaders that use
SSBO require GLSL versions that are not supported by freedreno yet.
For examples, most Khronos CTS tests under 'dEQP-GLES31.functional.ssbo.*'
are helped.
A random case:
dEQP-GLES31.functional.ssbo.layout.2_level_array.packed.row_major_mat3x2
with current master:
; CL prog 14/1: 1252 instructions, 0 half, 48 full
; 8 const, 8 constlen
; 61 (ss), 43 (sy)
with the SSBO dword-offset moved to NIR:
; CL prog 14/1: 1053 instructions, 0 half, 45 full
; 7 const, 7 constlen
; 34 (ss), 73 (sy)
The SHR previously emitted for every single SSBO instruction disappears
in most cases, and the dword-offset ends up embedded in the STGB
instruction as immediate in many cases as well.
There are also a few of those tests that are currently failing on register
allocation, that start to pass as a result of reducing the pressure. At least
these, probably more:
dEQP-GLES31.functional.ssbo.layout.random.unsized_arrays.24
dEQP-GLES31.functional.ssbo.layout.random.arrays_of_arrays.6
dEQP-GLES31.functional.ssbo.layout.random.arrays_of_arrays.17
dEQP-GLES31.functional.ssbo.layout.random.nested_structs_arrays.14
dEQP-GLES31.functional.ssbo.layout.random.nested_structs_arrays_instance_arrays.5
dEQP-GLES31.functional.ssbo.layout.random.nested_structs_arrays_instance_arrays.7
No regressions observed with relevant CTS and piglit tests.
Reviewed-by: Rob Clark <robdclark at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9dd0cfafc9ec4b4efb1e2df0329afc7a5a534231
Author: Eduardo Lima Mitev <elima at igalia.com>
Date: Sun Jan 13 20:10:34 2019 +0100
ir3/nir: Add a new pass 'ir3_nir_lower_io_offsets'
This NIR->NIR pass implements offset computations that are currently
done on the IR3 backend compiler, to give NIR a better chance of
optimizing them.
For now, it supports lowering the dword-offset computation for SSBO
instructions. It will take an SSBO intrinsic and replace it with the
new ir3-specific version that adds an extra source. That source will
hold the SSA value resulting from inserting a division by 4 (an SHR op)
of the original byte-offset source already provided by NIR in one of
the intrinsic sources.
Note that on a6xx the original byte-offset is not needed, so we could
potentially replace that source instead of adding a new one. But to
keep things simple and consistent we always add the new source and
a6xx will just ignore the original one.
Reviewed-by: Rob Clark <robdclark at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6ff50a488a12f86069bff88e3ad1b6473a76f014
Author: Eduardo Lima Mitev <elima at igalia.com>
Date: Tue Feb 26 08:45:07 2019 +0100
nir: Add ir3-specific version of most SSBO intrinsics
These are ir3 specific versions of SSBO intrinsics that add an
extra source to hold the element offset (dword), which is what the
backend instructions need.
The original byte-offset source provided by NIR is not replaced
because on a4xx and a5xx the backend still needs it.
Reviewed-by: Rob Clark <robdclark at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=03a0801bcb1828d785d8f7ef46a4000a8e0c1ce1
Author: Dylan Baker <dylan at pnwbakers.com>
Date: Wed Mar 13 12:36:27 2019 -0700
docs: update calendar, add news item, and link release notes for 19.0.0
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0cd487f3754494f61630a1922004a0852d87eb07
Author: Dylan Baker <dylan at pnwbakers.com>
Date: Wed Mar 13 12:09:08 2019 -0700
docs: Add SHA256 sums for 19.0.0
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=44273b4806fcf7c26bdcea43ae55cc634fe1d324
Author: Dylan Baker <dylan at pnwbakers.com>
Date: Wed Mar 13 10:40:19 2019 -0700
docs: Add release notes for 19.0.0
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=70b36c0ef939048acb9c4727b2e4280fc090eb74
Author: Kevin Strasser <kevin.strasser at intel.com>
Date: Mon Jan 28 10:42:44 2019 -0800
egl/dri: Avoid out of bounds array access
indexConfigAttrib iterates over every index in the dri driver, possibly
exceeding __DRI_ATTRIB_MAX. In other words, if the dri driver has newer
attributes libEGL will end up reading from uninitialized memory through
dri2_to_egl_attribute_map[].
Signed-off-by: Kevin Strasser <kevin.strasser at intel.com>
Cc: mesa-stable at lists.freedesktop.org
Reviewed-by: Emil Velikov <emil.velikov at collabora.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=97ad0efba08d336813366b9cab114c94c2ca61db
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Fri Feb 22 20:53:41 2019 +0000
iris: Use streaming loads to read from tiled surfaces
Always use the streaming load (since we know we have Broadwell+, all of
our target CPU support sse41) for reading back form the tiled surface
for mapping the resource. This means we hit the fast WC handling paths
on Atoms (without LLC), and for big Core (with LLC) using the streaming
load is no less efficient as we do not require the tiled buffer to be
pulled into the CPU cache.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=797fb6c6ac96cb7d1d5f9a04dc4f22f350093a16
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Fri Feb 22 21:24:46 2019 +0000
iris: Use coherent allocation for PIPE_RESOURCE_STAGING
On !llc machines (Atoms), reading from a linear buffers is slow and so
copying from one resource into the linear staging buffer is still slow.
However, we can tell the GPU to snoop the CPU cache when reading from and
writing to the staging buffer eliminating the slow uncached reads.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=01b224047b0013380a5e8b709eaf2e3cd9976b39
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Mon Feb 25 09:42:49 2019 +0000
iris: Use PIPE_BUFFER_STAGING for the query objects
We prefer fast CPU access to read back the query results.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=65e8761474ca8c9c0cce167cb32b720c3cc25a90
Author: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
Date: Mon Mar 11 09:43:04 2019 -0700
intel/nir: Combine store_derefs to improve code from SPIR-V
Due to lack of write mask in SPIR-V store, generators may produce
multiple stores to the same vector but using different array derefs.
Use the combining store pass to clean this up. For example,
layout(binding = 3) buffer block {
vec4 v;
};
void main() {
v.x = 11;
v.y = 22;
}
after going to SPIR-V and NIR, ends up with in two store_derefs to
v[0] and v[1]
vec2 32 ssa_4 = deref_struct &ssa_3->field0 (ssbo vec4) /* &((block *)ssa_2)->field0 */
vec2 32 ssa_6 = deref_array &(*ssa_4)[0] (ssbo float) /* &((block *)ssa_2)->field0[0] */
intrinsic store_deref (ssa_6, ssa_7) (1, 0) /* wrmask=x */ /* access=0 */
vec1 32 ssa_13 = load_const (0x00000001 /* 0.000000 */)
vec2 32 ssa_14 = deref_array &(*ssa_4)[1] (ssbo float) /* &((block *)ssa_2)->field0[1] */
intrinsic store_deref (ssa_14, ssa_15) (1, 0) /* wrmask=x */ /* access=0 */
producing two different sends instructions in skl. The combining pass
transform the snippet above into
vec2 32 ssa_4 = deref_struct &ssa_3->field0 (ssbo vec4) /* &((block *)ssa_2)->field0 */
vec4 32 ssa_18 = vec4 ssa_7, ssa_15, ssa_16, ssa_17
intrinsic store_deref (ssa_4, ssa_18) (3, 0) /* wrmask=xy */ /* access=0 */
producing a single sends instruction.
v2: Move this from spirv_to_nir into the general optimization pass for
intel compiler. (Jason)
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=10dfb0011e7079e770184d252045c13c40e6b274
Author: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
Date: Fri Mar 8 11:50:47 2019 -0800
intel/nir: Combine store_derefs after vectorizing IO
Shader-db results for skl:
total instructions in shared programs: 15232903 -> 15224781 (-0.05%)
instructions in affected programs: 61246 -> 53124 (-13.26%)
helped: 221
HURT: 0
total cycles in shared programs: 371440470 -> 371398018 (-0.01%)
cycles in affected programs: 281363 -> 238911 (-15.09%)
helped: 221
HURT: 0
Results for bdw are very similar.
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=822a8865e4645ed7e1818568d1d0338b462c7748
Author: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
Date: Fri Mar 8 10:08:20 2019 -0800
nir: Add a pass to combine store_derefs to same vector
v2: (all from Jason)
Reuse existing function for the end of the block combinations.
Check the SSA values are coming from the right place in tests.
Document the case when the store to array_deref is reused.
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cbf022cb316f1224f9afcc12ca414fc2d7d778a8
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date: Wed Mar 13 14:04:14 2019 +0100
ac: use the raw tbuffer version for 16-bit SSBO loads
vindex is always 0.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=045fae0f734a39cd24e444ac05382545dc7fdd2e
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date: Wed Mar 13 14:04:13 2019 +0100
ac: add ac_build_{struct,raw}_tbuffer_load() helpers
The struct version sets IDXEN=1, while the raw version sets IDXEN=0.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a66b186bebf9b63897199b9b6e26d40977417f74
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date: Tue Feb 26 13:42:28 2019 +0100
radv: use typed buffer loads for vertex input fetches
This drastically reduces the number of SGPRs because the driver
now uses descriptors per vertex binding, instead of per vertex
attribute format.
29077 shaders in 15096 tests
Totals:
SGPRS: 1354285 -> 1282109 (-5.33 %)
VGPRS: 909896 -> 908800 (-0.12 %)
Spilled SGPRs: 24840 -> 24811 (-0.12 %)
Code Size: 49221144 -> 48986628 (-0.48 %) bytes
Max Waves: 243930 -> 244229 (0.12 %)
Totals from affected shaders:
SGPRS: 390648 -> 318472 (-18.48 %)
VGPRS: 288432 -> 287336 (-0.38 %)
Spilled SGPRs: 94 -> 65 (-30.85 %)
Code Size: 11548412 -> 11313896 (-2.03 %) bytes
Max Waves: 86460 -> 86759 (0.35 %)
This gives a really tiny boost.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0b9a06a1a0e4f4b7130a5c372d13b586a8d66878
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date: Tue Feb 26 13:42:27 2019 +0100
radv: store more vertex attribute infos as pipeline keys
They are required for using typed buffer loads.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=489dac0d21baf069cf0045e785330eb1b16094a4
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date: Tue Feb 26 13:42:26 2019 +0100
ac: rework typed buffers loads for LLVM 7
Be more generic, this will be used by an upcoming series.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=56e04f67f906aea6101ba6081c5b0efcc25999cc
Author: Tomeu Vizoso <tomeu.vizoso at collabora.com>
Date: Mon Mar 11 13:35:27 2019 +0100
panfrost: Set bo->gem_handle when creating a linear BO
So we can free it later.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso at collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa at rosenzweig.io>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=bfbad30543dd896459b09e0e05bc70ea1727e0b9
Author: Tomeu Vizoso <tomeu.vizoso at collabora.com>
Date: Mon Mar 11 13:34:53 2019 +0100
panfrost: Set bo->size[0] in the DRM backend
So we can unmap it later.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso at collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa at rosenzweig.io>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3570d15b6d88bdcd353b31ffe5460d04a88b7b6f
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Mar 11 19:00:21 2019 -0700
intel/fs: Fix opt_peephole_csel to not throw away saturates.
We were not copying the saturate bit from the original instruction
to the new replacement instruction. This caused major misrendering
in DiRT Rally on iris, where comparisons leading to discards failed
due to the missing saturate, causing lots of extra garbage pixels to
be drawn in text rendering, trees, and so on.
This did not show up on i965 because st/nir performs a more aggressive
version of nir_opt_peephole_select, yielding more b32csel operations.
Fixes: 52c7df1643e i965/fs: Merge CMP and SEL into CSEL on Gen8+
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=bd17bdc56b34a08c421172df27fe07294c7a7024
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Mon Mar 11 20:43:15 2019 -0500
glsl/lower_vector_derefs: Don't use a temporary for TCS outputs
Tessellation control shader outputs act as if they have memory backing
them and you can have multiple writes to different components of the
same vector in-flight at the same time. When this happens, the load vec
store pattern that gets used by ir_triop_vector_insert doesn't yield the
correct results. Instead, just emit a sequence of conditional
assignments.
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Cc: mesa-stable at lists.freedesktop.org
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=20c4578c5539de909e94a6acc3ad680ab2ddeca6
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Mon Mar 11 21:01:34 2019 -0500
glsl/list: Add a list variant of insert_after
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=83fdefc06287f6c8bbb3bb5bb4ccd36d653017a3
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Tue Mar 12 16:25:39 2019 -0500
nir/loop_unroll: Fix out-of-bounds access handling
The previous code was completely broken when it came to constructing the
undef values. I'm not sure how it ever worked. For the case of a copy
that reads an undefined value, we can just delete the copy because the
destination is a valid undefined value. This saves us the effort of
trying to construct a value for an arbitrary copy_deref intrinsic.
Fixes: e8a8937a04 "nir: add partial loop unrolling support"
Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c056609c439da964db8344a8fde66aec4bd9c877
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Tue Mar 12 18:18:58 2019 -0500
anv: Ignore VkRenderPassInputAttachementAspectCreateInfo
We don't care about the information but there's no sense in throwing a
debug warning about it. It's harmless but annoying to users.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109984
Reviewed-by: Sagar Ghuge <sagar.ghuge at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=486b181fd758c246c2d1eaa1975a858e84d64c32
Author: Eric Anholt <eric at anholt.net>
Date: Tue Mar 12 14:59:21 2019 -0700
v3d: Fix leak of the renderonly struct on screen destruction.
This makes v3d match vc4's destroy path.
Fixes: e113b21cb779 ("v3d: Add renderonly support.")
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0c874c18cd07539f56fede272a24b76f2946716f
Author: Eric Anholt <eric at anholt.net>
Date: Tue Mar 12 14:56:57 2019 -0700
v3d: Fix leak of the mem_ctx after the DAG refactor.
Noticed while trying to get a CTS run again.
Fixes: 33886474d646 ("v3d: Use the DAG datastructure for QPU instruction scheduling.")
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