Mesa (master): iris: Skip resolves and flushes altogether if unnecessary

GitLab Mirror gitlab-mirror at kemper.freedesktop.org
Fri Mar 22 03:31:51 UTC 2019


Module: Mesa
Branch: master
Commit: 66c100a8d6df74e3e4c0b24a618b2c116fc6bed1
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=66c100a8d6df74e3e4c0b24a618b2c116fc6bed1

Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Mon Mar 11 00:04:56 2019 -0700

iris: Skip resolves and flushes altogether if unnecessary

Improves drawoverhead baseline scores by 1.17x.

---

 src/gallium/drivers/iris/iris_context.h |  5 ++++-
 src/gallium/drivers/iris/iris_draw.c    | 19 +++++++++++--------
 src/gallium/drivers/iris/iris_state.c   | 12 ++++++++++++
 3 files changed, 27 insertions(+), 9 deletions(-)

diff --git a/src/gallium/drivers/iris/iris_context.h b/src/gallium/drivers/iris/iris_context.h
index 3cd03850e1b..494c931d0f0 100644
--- a/src/gallium/drivers/iris/iris_context.h
+++ b/src/gallium/drivers/iris/iris_context.h
@@ -125,12 +125,15 @@ enum iris_param_domain {
 #define IRIS_DIRTY_VF_SGVS                  (1ull << 52)
 #define IRIS_DIRTY_VF                       (1ull << 53)
 #define IRIS_DIRTY_VF_TOPOLOGY              (1ull << 54)
+#define IRIS_DIRTY_RENDER_RESOLVES_AND_FLUSHES  (1ull << 55)
+#define IRIS_DIRTY_COMPUTE_RESOLVES_AND_FLUSHES (1ull << 56)
 
 #define IRIS_ALL_DIRTY_FOR_COMPUTE (IRIS_DIRTY_CS | \
                                     IRIS_DIRTY_SAMPLER_STATES_CS | \
                                     IRIS_DIRTY_UNCOMPILED_CS | \
                                     IRIS_DIRTY_CONSTANTS_CS | \
-                                    IRIS_DIRTY_BINDINGS_CS)
+                                    IRIS_DIRTY_BINDINGS_CS | \
+                                    IRIS_DIRTY_COMPUTE_RESOLVES_AND_FLUSHES)
 
 #define IRIS_ALL_DIRTY_FOR_RENDER ~IRIS_ALL_DIRTY_FOR_COMPUTE
 
diff --git a/src/gallium/drivers/iris/iris_draw.c b/src/gallium/drivers/iris/iris_draw.c
index 82a78145ecd..ab162583ca9 100644
--- a/src/gallium/drivers/iris/iris_draw.c
+++ b/src/gallium/drivers/iris/iris_draw.c
@@ -133,14 +133,15 @@ iris_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
 
    iris_update_compiled_shaders(ice);
 
-   bool draw_aux_buffer_disabled[BRW_MAX_DRAW_BUFFERS] = { };
-   for (gl_shader_stage stage = 0; stage < MESA_SHADER_COMPUTE; stage++) {
-      if (ice->shaders.prog[stage]) {
-         iris_predraw_resolve_inputs(ice, batch, draw_aux_buffer_disabled,
-                                     stage, true);
+   if (ice->state.dirty & IRIS_DIRTY_RENDER_RESOLVES_AND_FLUSHES) {
+      bool draw_aux_buffer_disabled[BRW_MAX_DRAW_BUFFERS] = { };
+      for (gl_shader_stage stage = 0; stage < MESA_SHADER_COMPUTE; stage++) {
+         if (ice->shaders.prog[stage])
+            iris_predraw_resolve_inputs(ice, batch, draw_aux_buffer_disabled,
+                                        stage, true);
       }
+      iris_predraw_resolve_framebuffer(ice, batch, draw_aux_buffer_disabled);
    }
-   iris_predraw_resolve_framebuffer(ice, batch, draw_aux_buffer_disabled);
 
    iris_binder_reserve_3d(ice);
 
@@ -215,8 +216,10 @@ iris_launch_grid(struct pipe_context *ctx, const struct pipe_grid_info *grid)
    /* We can't do resolves on the compute engine, so awkwardly, we have to
     * do them on the render batch...
     */
-   iris_predraw_resolve_inputs(ice, &ice->batches[IRIS_BATCH_RENDER], NULL,
-                               MESA_SHADER_COMPUTE, false);
+   if (ice->state.dirty & IRIS_DIRTY_COMPUTE_RESOLVES_AND_FLUSHES) {
+      iris_predraw_resolve_inputs(ice, &ice->batches[IRIS_BATCH_RENDER], NULL,
+                                  MESA_SHADER_COMPUTE, false);
+   }
 
    iris_batch_maybe_flush(batch, 1500);
 
diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c
index c16fa22b42b..e5f231158fc 100644
--- a/src/gallium/drivers/iris/iris_state.c
+++ b/src/gallium/drivers/iris/iris_state.c
@@ -971,6 +971,7 @@ iris_bind_blend_state(struct pipe_context *ctx, void *state)
 
    ice->state.dirty |= IRIS_DIRTY_PS_BLEND;
    ice->state.dirty |= IRIS_DIRTY_BLEND_STATE;
+   ice->state.dirty |= IRIS_DIRTY_RENDER_RESOLVES_AND_FLUSHES;
    ice->state.dirty |= ice->state.dirty_for_nos[IRIS_NOS_BLEND];
 }
 
@@ -1083,6 +1084,9 @@ iris_bind_zsa_state(struct pipe_context *ctx, void *state)
       if (cso_changed(alpha.func))
          ice->state.dirty |= IRIS_DIRTY_BLEND_STATE;
 
+      if (cso_changed(depth_writes_enabled))
+         ice->state.dirty |= IRIS_DIRTY_RENDER_RESOLVES_AND_FLUSHES;
+
       ice->state.depth_writes_enabled = new_cso->depth_writes_enabled;
       ice->state.stencil_writes_enabled = new_cso->stencil_writes_enabled;
    }
@@ -1986,6 +1990,9 @@ iris_set_shader_images(struct pipe_context *ctx,
    }
 
    ice->state.dirty |= IRIS_DIRTY_BINDINGS_VS << stage;
+   ice->state.dirty |=
+      stage == MESA_SHADER_COMPUTE ? IRIS_DIRTY_COMPUTE_RESOLVES_AND_FLUSHES
+                                   : IRIS_DIRTY_RENDER_RESOLVES_AND_FLUSHES;
 
    /* Broadwell also needs brw_image_params re-uploaded */
    if (GEN_GEN < 9) {
@@ -2021,6 +2028,9 @@ iris_set_sampler_views(struct pipe_context *ctx,
    }
 
    ice->state.dirty |= (IRIS_DIRTY_BINDINGS_VS << stage);
+   ice->state.dirty |=
+      stage == MESA_SHADER_COMPUTE ? IRIS_DIRTY_COMPUTE_RESOLVES_AND_FLUSHES
+                                   : IRIS_DIRTY_RENDER_RESOLVES_AND_FLUSHES;
 }
 
 /**
@@ -2359,6 +2369,8 @@ iris_set_framebuffer_state(struct pipe_context *ctx,
    /* Render target change */
    ice->state.dirty |= IRIS_DIRTY_BINDINGS_FS;
 
+   ice->state.dirty |= IRIS_DIRTY_RENDER_RESOLVES_AND_FLUSHES;
+
    ice->state.dirty |= ice->state.dirty_for_nos[IRIS_NOS_FRAMEBUFFER];
 
 #if GEN_GEN == 11




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