Mesa (master): freedreno/ir3: convert to "new style" frag inputs

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Module: Mesa
Branch: master
Commit: 7ff6705b8d89fb2cf43604aefc96ed634c78be9d
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7ff6705b8d89fb2cf43604aefc96ed634c78be9d

Author: Rob Clark <robdclark at gmail.com>
Date:   Sat Mar 23 11:38:37 2019 -0400

freedreno/ir3: convert to "new style" frag inputs

Add support for load_barycentric_pixel, load_interpolated_input, and
friends.  For now, this retains support for old-style inputs, which can
probably be dropped with some ttn work.

Prep work for sample-shading support.

Signed-off-by: Rob Clark <robdclark at gmail.com>

---

 src/freedreno/ir3/ir3_compiler_nir.c | 29 +++++++++++++++++++++++++++++
 src/freedreno/ir3/ir3_nir.c          |  6 ++++--
 2 files changed, 33 insertions(+), 2 deletions(-)

diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c
index ec741ae92d9..4171324ccdb 100644
--- a/src/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/freedreno/ir3/ir3_compiler_nir.c
@@ -1172,6 +1172,34 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
 	case nir_intrinsic_load_ubo:
 		emit_intrinsic_load_ubo(ctx, intr, dst);
 		break;
+	case nir_intrinsic_load_barycentric_centroid:
+	case nir_intrinsic_load_barycentric_pixel:
+		ir3_split_dest(b, dst, ctx->frag_vcoord, 0, 2);
+		break;
+	case nir_intrinsic_load_interpolated_input:
+		idx = nir_intrinsic_base(intr);
+		comp = nir_intrinsic_component(intr);
+		src = ir3_get_src(ctx, &intr->src[0]);
+		const_offset = nir_src_as_const_value(intr->src[1]);
+		if (const_offset) {
+			struct ir3_instruction *coord = ir3_create_collect(ctx, src, 2);
+			idx += const_offset->u32[0];
+			for (int i = 0; i < intr->num_components; i++) {
+				unsigned inloc = idx * 4 + i + comp;
+				if (ctx->so->inputs[idx * 4].bary) {
+					dst[i] = ir3_BARY_F(b, create_immed(b, inloc), 0, coord, 0);
+				} else {
+					/* for non-varyings use the pre-setup input, since
+					 * that is easier than mapping things back to a
+					 * nir_variable to figure out what it is.
+					 */
+					dst[i] = ctx->ir->inputs[inloc];
+				}
+			}
+		} else {
+			ir3_context_error(ctx, "unhandled");
+		}
+		break;
 	case nir_intrinsic_load_input:
 		idx = nir_intrinsic_base(intr);
 		comp = nir_intrinsic_component(intr);
@@ -1181,6 +1209,7 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
 			for (int i = 0; i < intr->num_components; i++) {
 				unsigned n = idx * 4 + i + comp;
 				dst[i] = ctx->ir->inputs[n];
+				compile_assert(ctx, ctx->ir->inputs[n]);
 			}
 		} else {
 			src = ir3_get_src(ctx, &intr->src[0]);
diff --git a/src/freedreno/ir3/ir3_nir.c b/src/freedreno/ir3/ir3_nir.c
index 61ebc615155..8b66615a6e0 100644
--- a/src/freedreno/ir3/ir3_nir.c
+++ b/src/freedreno/ir3/ir3_nir.c
@@ -49,11 +49,12 @@ static const nir_shader_compiler_options options = {
 		.vertex_id_zero_based = true,
 		.lower_extract_byte = true,
 		.lower_extract_word = true,
-		.lower_all_io_to_temps = true,
+		.lower_all_io_to_elements = true,
 		.lower_helper_invocation = true,
 		.lower_bitfield_insert_to_shifts = true,
 		.lower_bitfield_extract_to_shifts = true,
 		.lower_bfm = true,
+		.use_interpolated_input_intrinsics = true,
 };
 
 /* we don't want to lower vertex_id to _zero_based on newer gpus: */
@@ -75,11 +76,12 @@ static const nir_shader_compiler_options options_a6xx = {
 		.vertex_id_zero_based = false,
 		.lower_extract_byte = true,
 		.lower_extract_word = true,
-		.lower_all_io_to_temps = true,
+		.lower_all_io_to_elements = true,
 		.lower_helper_invocation = true,
 		.lower_bitfield_insert_to_shifts = true,
 		.lower_bitfield_extract_to_shifts = true,
 		.lower_bfm = true,
+		.use_interpolated_input_intrinsics = true,
 };
 
 const nir_shader_compiler_options *