Mesa (staging/19.0): anv: Fix some depth buffer sampling cases on ICL+
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Fri May 17 22:32:07 UTC 2019
Module: Mesa
Branch: staging/19.0
Commit: e8d9b339867c5e375975b8f1dd25839a13187b8d
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e8d9b339867c5e375975b8f1dd25839a13187b8d
Author: Nanley Chery <nanley.g.chery at intel.com>
Date: Tue Apr 30 14:49:10 2019 -0700
anv: Fix some depth buffer sampling cases on ICL+
Don't attempt sampling with HiZ if the sampler lacks support for it. On
ICL, the HW docs state that sampling with HiZ is not supported and that
instances of AUX_HIZ in the RENDER_SURFACE_STATE object will be
interpreted as AUX_NONE.
Cc: <mesa-stable at lists.freedesktop.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
(cherry picked from commit 629806b55bccd7f3e5b7b753820c4442fdb30bbe)
---
src/intel/vulkan/anv_private.h | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index c10d4732942..9979b832a7b 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -3062,7 +3062,13 @@ anv_can_sample_with_hiz(const struct gen_device_info * const devinfo,
if (!(image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT))
return false;
- if (devinfo->gen < 8)
+ /* Allow this feature on BDW even though it is disabled in the BDW devinfo
+ * struct. There's documentation which suggests that this feature actually
+ * reduces performance on BDW, but it has only been observed to help so
+ * far. Sampling fast-cleared blocks on BDW must also be handled with care
+ * (see depth_stencil_attachment_compute_aux_usage() for more info).
+ */
+ if (devinfo->gen != 8 && !devinfo->has_sample_with_hiz)
return false;
return image->samples == 1;
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