Mesa (master): pan/midgard: offset_swizzle doesn't need dstsize
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Mon Nov 4 21:00:31 UTC 2019
Module: Mesa
Branch: master
Commit: f538981384271f8fd0c03a8633e3870f12106ddc
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f538981384271f8fd0c03a8633e3870f12106ddc
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date: Mon Nov 4 10:44:54 2019 -0500
pan/midgard: offset_swizzle doesn't need dstsize
This argument should be omitted.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
---
src/panfrost/midgard/midgard_ra.c | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/src/panfrost/midgard/midgard_ra.c b/src/panfrost/midgard/midgard_ra.c
index 534d095eac1..e923a3a9420 100644
--- a/src/panfrost/midgard/midgard_ra.c
+++ b/src/panfrost/midgard/midgard_ra.c
@@ -76,15 +76,15 @@ struct phys_reg {
* by dst_offset. TODO: vec8+ */
static void
-offset_swizzle(unsigned *swizzle, unsigned reg_offset, unsigned srcsize, unsigned dst_offset, unsigned dstsize)
+offset_swizzle(unsigned *swizzle, unsigned reg_offset, unsigned srcsize, unsigned dst_offset)
{
unsigned out[MIR_VEC_COMPONENTS];
signed reg_comp = reg_offset / srcsize;
- signed dst_comp = dst_offset / dstsize;
+ signed dst_comp = dst_offset / srcsize;
assert(reg_comp * srcsize == reg_offset);
- assert(dst_comp * dstsize == dst_offset);
+ assert(dst_comp * srcsize == dst_offset);
for (signed c = 0; c < MIR_VEC_COMPONENTS; ++c) {
signed comp = MAX2(c - dst_comp, 0);
@@ -750,7 +750,7 @@ install_registers_instr(
GET_CHANNEL_COUNT(alu_opcode_props[ins->alu.op].props) ? 0 :
dest.offset;
- offset_swizzle(ins->swizzle[0], src1.offset, src1.size, dest_offset, dest.size);
+ offset_swizzle(ins->swizzle[0], src1.offset, src1.size, dest_offset);
ins->registers.src1_reg = src1.reg;
@@ -770,7 +770,7 @@ install_registers_instr(
} else {
midgard_vector_alu_src mod2 =
vector_alu_from_unsigned(ins->alu.src2);
- offset_swizzle(ins->swizzle[1], src2.offset, src2.size, dest_offset, dest.size);
+ offset_swizzle(ins->swizzle[1], src2.offset, src2.size, dest_offset);
ins->alu.src2 = vector_alu_srco_unsigned(mod2);
ins->registers.src2_reg = src2.reg;
@@ -792,12 +792,12 @@ install_registers_instr(
assert(src.reg == 26 || src.reg == 27);
ins->load_store.reg = src.reg - 26;
- offset_swizzle(ins->swizzle[0], src.offset, src.size, 0, 4);
+ offset_swizzle(ins->swizzle[0], src.offset, src.size, 0);
} else {
struct phys_reg dst = index_to_reg(ctx, g, ins->dest, mir_typesize(ins));
ins->load_store.reg = dst.reg;
- offset_swizzle(ins->swizzle[0], 0, 4, dst.offset, dst.size);
+ offset_swizzle(ins->swizzle[0], 0, 4, dst.offset);
mir_set_bytemask(ins, mir_bytemask(ins) << dst.offset);
}
@@ -836,13 +836,13 @@ install_registers_instr(
ins->texture.in_reg_full = 1;
ins->texture.in_reg_upper = 0;
ins->texture.in_reg_select = coord.reg - 28;
- offset_swizzle(ins->swizzle[1], coord.offset, coord.size, 0, 4);
+ offset_swizzle(ins->swizzle[1], coord.offset, coord.size, 0);
/* Next, install the destination */
ins->texture.out_full = 1;
ins->texture.out_upper = 0;
ins->texture.out_reg_select = dest.reg - 28;
- offset_swizzle(ins->swizzle[0], 0, 4, dest.offset, dest.size);
+ offset_swizzle(ins->swizzle[0], 0, 4, dest.offset);
mir_set_bytemask(ins, mir_bytemask(ins) << dest.offset);
/* If there is a register LOD/bias, use it */
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