Mesa (master): radv/gfx10: enable wave32 for compute based on shader's wavesize
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Wed Nov 6 08:34:13 UTC 2019
Module: Mesa
Branch: master
Commit: f010b90ac5c8b3e8df3264086e472bd5df1cb9bc
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f010b90ac5c8b3e8df3264086e472bd5df1cb9bc
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date: Thu Oct 31 09:30:47 2019 +0100
radv/gfx10: enable wave32 for compute based on shader's wavesize
This will allow to change wavesize on-demand.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
---
src/amd/vulkan/radv_cmd_buffer.c | 5 +++++
src/amd/vulkan/radv_device.c | 3 +--
src/amd/vulkan/radv_pipeline.c | 2 +-
3 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index a172767e3dd..87320e6d822 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -4850,6 +4850,11 @@ radv_emit_dispatch_packets(struct radv_cmd_buffer *cmd_buffer,
ASSERTED unsigned cdw_max = radeon_check_space(ws, cs, 25);
+ if (compute_shader->info.wave_size == 32) {
+ assert(cmd_buffer->device->physical_device->rad_info.chip_class >= GFX10);
+ dispatch_initiator |= S_00B800_CS_W32_EN(1);
+ }
+
if (info->indirect) {
uint64_t va = radv_buffer_get_va(info->indirect->bo);
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index e35c3e43d83..ec59bfb1ea9 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -2486,8 +2486,7 @@ VkResult radv_CreateDevice(
device->scratch_waves = MAX2(32 * physical_device->rad_info.num_good_compute_units,
max_threads_per_block / 64);
- device->dispatch_initiator = S_00B800_COMPUTE_SHADER_EN(1) |
- S_00B800_CS_W32_EN(device->physical_device->cs_wave_size == 32);
+ device->dispatch_initiator = S_00B800_COMPUTE_SHADER_EN(1);
if (device->physical_device->rad_info.chip_class >= GFX7) {
/* If the KMD allows it (there is a KMD hw register for it),
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index ee0a2438788..8932d9fa54d 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -5042,7 +5042,7 @@ radv_compute_generate_pm4(struct radv_pipeline *pipeline)
compute_shader->info.cs.block_size[1] *
compute_shader->info.cs.block_size[2];
waves_per_threadgroup = DIV_ROUND_UP(threads_per_threadgroup,
- device->physical_device->cs_wave_size);
+ compute_shader->info.wave_size);
if (device->physical_device->rad_info.chip_class >= GFX10 &&
waves_per_threadgroup == 1)
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