Mesa (master): panfrost: Set 0x10 bit on mali_shader_meta.unknown2_4 on T720

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Module: Mesa
Branch: master
Commit: e40d11ccb27f4ebfc2d7874443fe44969a3f28df
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e40d11ccb27f4ebfc2d7874443fe44969a3f28df

Author: Tomeu Vizoso <tomeu.vizoso at collabora.com>
Date:   Tue Nov  5 16:25:27 2019 +0100

panfrost: Set 0x10 bit on mali_shader_meta.unknown2_4 on T720

Testing shows that it's needed.

Also remove ctx->is_t6xx as it was the last use of it.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso at collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>

---

 src/gallium/drivers/panfrost/pan_context.c | 7 +++----
 src/gallium/drivers/panfrost/pan_context.h | 3 ---
 2 files changed, 3 insertions(+), 7 deletions(-)

diff --git a/src/gallium/drivers/panfrost/pan_context.c b/src/gallium/drivers/panfrost/pan_context.c
index 285936c5c26..5334c686941 100644
--- a/src/gallium/drivers/panfrost/pan_context.c
+++ b/src/gallium/drivers/panfrost/pan_context.c
@@ -400,6 +400,7 @@ panfrost_make_stencil_state(const struct pipe_stencil_state *in, struct mali_ste
 static void
 panfrost_default_shader_backend(struct panfrost_context *ctx)
 {
+        struct panfrost_screen *screen = pan_screen(ctx->base.screen);
         struct mali_shader_meta shader = {
                 .alpha_coverage = ~MALI_ALPHA_COVERAGE(0.000000),
 
@@ -407,13 +408,13 @@ panfrost_default_shader_backend(struct panfrost_context *ctx)
                 .unknown2_4 = MALI_NO_MSAA | 0x4e0,
         };
 
-        /* unknown2_4 has 0x10 bit set on T6XX. We don't know why this is
+        /* unknown2_4 has 0x10 bit set on T6XX and T720. We don't know why this is
          * required (independent of 32-bit/64-bit descriptors), or why it's not
          * used on later GPU revisions. Otherwise, all shader jobs fault on
          * these earlier chips (perhaps this is a chicken bit of some kind).
          * More investigation is needed. */
 
-	if (ctx->is_t6xx) {
+	if (screen->require_sfbd) {
 		shader.unknown2_4 |= 0x10;
 	}
 
@@ -2630,8 +2631,6 @@ panfrost_create_context(struct pipe_screen *screen, void *priv, unsigned flags)
         struct panfrost_screen *pscreen = pan_screen(screen);
         struct pipe_context *gallium = (struct pipe_context *) ctx;
 
-        ctx->is_t6xx = pscreen->gpu_id < 0x0700; /* Literally, "earlier than T700" */
-
         gallium->screen = screen;
 
         gallium->destroy = panfrost_destroy;
diff --git a/src/gallium/drivers/panfrost/pan_context.h b/src/gallium/drivers/panfrost/pan_context.h
index 8460b8a9738..07f0c5d89c5 100644
--- a/src/gallium/drivers/panfrost/pan_context.h
+++ b/src/gallium/drivers/panfrost/pan_context.h
@@ -188,9 +188,6 @@ struct panfrost_context {
         struct pipe_blend_color blend_color;
         struct pipe_depth_stencil_alpha_state *depth_stencil;
         struct pipe_stencil_ref stencil_ref;
-
-        /* True for t6XX, false for t8xx. */
-        bool is_t6xx;
 };
 
 /* Corresponds to the CSO */