Mesa (master): freedreno/ir3: split pre-coloring to it's own function
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Sat Nov 9 03:07:47 UTC 2019
Module: Mesa
Branch: master
Commit: 8449f6183ff37c87e865aaae508e0289fed51f1c
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8449f6183ff37c87e865aaae508e0289fed51f1c
Author: Rob Clark <robdclark at chromium.org>
Date: Tue Oct 22 09:22:58 2019 -0700
freedreno/ir3: split pre-coloring to it's own function
Signed-off-by: Rob Clark <robdclark at chromium.org>
---
src/freedreno/ir3/ir3_ra.c | 15 ++++++++++++---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/src/freedreno/ir3/ir3_ra.c b/src/freedreno/ir3/ir3_ra.c
index 39d34bb51d9..100ce422354 100644
--- a/src/freedreno/ir3/ir3_ra.c
+++ b/src/freedreno/ir3/ir3_ra.c
@@ -1089,8 +1089,12 @@ ra_block_alloc(struct ir3_ra_ctx *ctx, struct ir3_block *block)
}
}
-static int
-ra_alloc(struct ir3_ra_ctx *ctx, struct ir3_instruction **precolor, unsigned nprecolor)
+/* handle pre-colored registers. This includes "arrays" (which could be of
+ * length 1, used for phi webs lowered to registers in nir), as well as
+ * special shader input values that need to be pinned to certain registers.
+ */
+static void
+ra_precolor(struct ir3_ra_ctx *ctx, struct ir3_instruction **precolor, unsigned nprecolor)
{
unsigned num_precolor = 0;
for (unsigned i = 0; i < nprecolor; i++) {
@@ -1195,7 +1199,11 @@ retry:
ra_set_node_reg(ctx->g, name, reg);
}
}
+}
+static int
+ra_alloc(struct ir3_ra_ctx *ctx)
+{
if (!ra_allocate(ctx->g))
return -1;
@@ -1217,7 +1225,8 @@ int ir3_ra(struct ir3_shader_variant *v, struct ir3_instruction **precolor, unsi
ra_init(&ctx);
ra_add_interference(&ctx);
- ret = ra_alloc(&ctx, precolor, nprecolor);
+ ra_precolor(&ctx, precolor, nprecolor);
+ ret = ra_alloc(&ctx);
ra_destroy(&ctx);
return ret;
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