Mesa (master): intel/nir: Plumb devinfo through lower_mem_access_bit_sizes

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Module: Mesa
Branch: master
Commit: e2297699de8eda49fb2c2c54307b44d4097d0b95
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e2297699de8eda49fb2c2c54307b44d4097d0b95

Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Thu Feb 28 10:02:03 2019 -0600

intel/nir: Plumb devinfo through lower_mem_access_bit_sizes

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>

---

 src/intel/compiler/brw_nir.c                           |  2 +-
 src/intel/compiler/brw_nir.h                           |  3 ++-
 .../compiler/brw_nir_lower_mem_access_bit_sizes.c      | 18 +++++++++++-------
 3 files changed, 14 insertions(+), 9 deletions(-)

diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
index ed6bcff7009..547b60ddc0f 100644
--- a/src/intel/compiler/brw_nir.c
+++ b/src/intel/compiler/brw_nir.c
@@ -814,7 +814,7 @@ brw_postprocess_nir(nir_shader *nir, const struct brw_compiler *compiler,
 
    UNUSED bool progress; /* Written by OPT */
 
-   OPT(brw_nir_lower_mem_access_bit_sizes);
+   OPT(brw_nir_lower_mem_access_bit_sizes, devinfo);
 
    do {
       progress = false;
diff --git a/src/intel/compiler/brw_nir.h b/src/intel/compiler/brw_nir.h
index 6f685478fd8..556648e6f72 100644
--- a/src/intel/compiler/brw_nir.h
+++ b/src/intel/compiler/brw_nir.h
@@ -128,7 +128,8 @@ void brw_nir_rewrite_image_intrinsic(nir_intrinsic_instr *intrin,
 void brw_nir_rewrite_bindless_image_intrinsic(nir_intrinsic_instr *intrin,
                                               nir_ssa_def *handle);
 
-bool brw_nir_lower_mem_access_bit_sizes(nir_shader *shader);
+bool brw_nir_lower_mem_access_bit_sizes(nir_shader *shader,
+                                        const struct gen_device_info *devinfo);
 
 void brw_postprocess_nir(nir_shader *nir,
                          const struct brw_compiler *compiler,
diff --git a/src/intel/compiler/brw_nir_lower_mem_access_bit_sizes.c b/src/intel/compiler/brw_nir_lower_mem_access_bit_sizes.c
index 80aae4916bf..564cb6dabe3 100644
--- a/src/intel/compiler/brw_nir_lower_mem_access_bit_sizes.c
+++ b/src/intel/compiler/brw_nir_lower_mem_access_bit_sizes.c
@@ -74,7 +74,8 @@ dup_mem_intrinsic(nir_builder *b, nir_intrinsic_instr *intrin,
 }
 
 static bool
-lower_mem_load_bit_size(nir_builder *b, nir_intrinsic_instr *intrin)
+lower_mem_load_bit_size(nir_builder *b, nir_intrinsic_instr *intrin,
+                        const struct gen_device_info *devinfo)
 {
    assert(intrin->dest.is_ssa);
    if (intrin->dest.ssa.bit_size == 32)
@@ -140,7 +141,8 @@ lower_mem_load_bit_size(nir_builder *b, nir_intrinsic_instr *intrin)
 }
 
 static bool
-lower_mem_store_bit_size(nir_builder *b, nir_intrinsic_instr *intrin)
+lower_mem_store_bit_size(nir_builder *b, nir_intrinsic_instr *intrin,
+                         const struct gen_device_info *devinfo)
 {
    assert(intrin->src[0].is_ssa);
    nir_ssa_def *value = intrin->src[0].ssa;
@@ -223,7 +225,8 @@ lower_mem_store_bit_size(nir_builder *b, nir_intrinsic_instr *intrin)
 }
 
 static bool
-lower_mem_access_bit_sizes_impl(nir_function_impl *impl)
+lower_mem_access_bit_sizes_impl(nir_function_impl *impl,
+                                const struct gen_device_info *devinfo)
 {
    bool progress = false;
 
@@ -242,14 +245,14 @@ lower_mem_access_bit_sizes_impl(nir_function_impl *impl)
          case nir_intrinsic_load_global:
          case nir_intrinsic_load_ssbo:
          case nir_intrinsic_load_shared:
-            if (lower_mem_load_bit_size(&b, intrin))
+            if (lower_mem_load_bit_size(&b, intrin, devinfo))
                progress = true;
             break;
 
          case nir_intrinsic_store_global:
          case nir_intrinsic_store_ssbo:
          case nir_intrinsic_store_shared:
-            if (lower_mem_store_bit_size(&b, intrin))
+            if (lower_mem_store_bit_size(&b, intrin, devinfo))
                progress = true;
             break;
 
@@ -284,12 +287,13 @@ lower_mem_access_bit_sizes_impl(nir_function_impl *impl)
  * handle in hardware and with a trivial write-mask.
  */
 bool
-brw_nir_lower_mem_access_bit_sizes(nir_shader *shader)
+brw_nir_lower_mem_access_bit_sizes(nir_shader *shader,
+                                   const struct gen_device_info *devinfo)
 {
    bool progress = false;
 
    nir_foreach_function(func, shader) {
-      if (func->impl && lower_mem_access_bit_sizes_impl(func->impl))
+      if (func->impl && lower_mem_access_bit_sizes_impl(func->impl, devinfo))
          progress = true;
    }