Mesa (master): radv: fix radv_nir_get_max_workgroup_size when nir=NULL

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Module: Mesa
Branch: master
Commit: de998d3eb5822b54aa56d4f18f402e7cddb0e507
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=de998d3eb5822b54aa56d4f18f402e7cddb0e507

Author: Rhys Perry <pendingchaos02 at gmail.com>
Date:   Mon Nov 11 11:16:31 2019 +0000

radv: fix radv_nir_get_max_workgroup_size when nir=NULL

Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com>
Fixes: 84a1a2578 ('compiler: pack shader_info from 160 bytes to 96 bytes')
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>

---

 src/amd/vulkan/radv_nir_to_llvm.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c
index 1ed1a382a37..c6fd727b7aa 100644
--- a/src/amd/vulkan/radv_nir_to_llvm.c
+++ b/src/amd/vulkan/radv_nir_to_llvm.c
@@ -4751,7 +4751,10 @@ radv_nir_get_max_workgroup_size(enum chip_class chip_class,
 				const struct nir_shader *nir)
 {
 	const unsigned backup_sizes[] = {chip_class >= GFX9 ? 128 : 64, 1, 1};
-	return radv_get_max_workgroup_size(chip_class, stage, nir ? nir->info.cs.local_size : backup_sizes);
+	unsigned sizes[3];
+	for (unsigned i = 0; i < 3; i++)
+		sizes[i] = nir ? nir->info.cs.local_size[i] : backup_sizes[i];
+	return radv_get_max_workgroup_size(chip_class, stage, sizes);
 }
 
 /* Fixup the HW not emitting the TCS regs if there are no HS threads. */