Mesa (master): nir: move data.image.access to data.access

GitLab Mirror gitlab-mirror at kemper.freedesktop.org
Tue Nov 19 23:22:00 UTC 2019


Module: Mesa
Branch: master
Commit: ebe757965567c85286245f82ba5b8f90804da19a
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ebe757965567c85286245f82ba5b8f90804da19a

Author: Marek Olšák <marek.olsak at amd.com>
Date:   Thu Nov  7 16:53:58 2019 -0500

nir: move data.image.access to data.access

The size of the data structure doesn't change.

Reviewed-by: Connor Abbott <cwabbott0 at gmail.com>

---

 src/amd/compiler/aco_instruction_selection.cpp           |  4 ++--
 src/amd/llvm/ac_nir_to_llvm.c                            |  4 ++--
 src/amd/vulkan/radv_meta_fmask_expand.c                  |  2 +-
 src/compiler/glsl/gl_nir_link_uniforms.c                 |  2 +-
 src/compiler/glsl/glsl_to_nir.cpp                        |  6 +++---
 src/compiler/nir/nir.c                                   |  2 +-
 src/compiler/nir/nir.h                                   | 11 ++++++-----
 src/compiler/nir/nir_deref.c                             |  2 +-
 src/compiler/nir/nir_opt_access.c                        |  8 ++++----
 src/compiler/nir/nir_print.c                             |  2 +-
 src/compiler/spirv/vtn_variables.c                       | 10 +++++-----
 src/gallium/auxiliary/nir/tgsi_to_nir.c                  |  4 ++--
 src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp |  2 +-
 src/intel/compiler/brw_nir_lower_image_load_store.c      |  4 ++--
 src/intel/vulkan/anv_nir_apply_pipeline_layout.c         |  4 ++--
 src/mesa/state_tracker/st_pbo.c                          |  2 +-
 16 files changed, 35 insertions(+), 34 deletions(-)

diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp
index 63fd36f3724..3bc866bc056 100644
--- a/src/amd/compiler/aco_instruction_selection.cpp
+++ b/src/amd/compiler/aco_instruction_selection.cpp
@@ -4065,7 +4065,7 @@ void visit_image_load(isel_context *ctx, nir_intrinsic_instr *instr)
    load->operands[0] = Operand(coords);
    load->operands[1] = Operand(resource);
    load->definitions[0] = Definition(tmp);
-   load->glc = var->data.image.access & (ACCESS_VOLATILE | ACCESS_COHERENT) ? 1 : 0;
+   load->glc = var->data.access & (ACCESS_VOLATILE | ACCESS_COHERENT) ? 1 : 0;
    load->dim = ac_get_image_dim(ctx->options->chip_class, dim, is_array);
    load->dmask = dmask;
    load->unrm = true;
@@ -4085,7 +4085,7 @@ void visit_image_store(isel_context *ctx, nir_intrinsic_instr *instr)
    bool is_array = glsl_sampler_type_is_array(type);
    Temp data = as_vgpr(ctx, get_ssa_temp(ctx, instr->src[3].ssa));
 
-   bool glc = ctx->options->chip_class == GFX6 || var->data.image.access & (ACCESS_VOLATILE | ACCESS_COHERENT | ACCESS_NON_READABLE) ? 1 : 0;
+   bool glc = ctx->options->chip_class == GFX6 || var->data.access & (ACCESS_VOLATILE | ACCESS_COHERENT | ACCESS_NON_READABLE) ? 1 : 0;
 
    if (dim == GLSL_SAMPLER_DIM_BUF) {
       Temp rsrc = get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr), ACO_DESC_BUFFER, nullptr, true, true);
diff --git a/src/amd/llvm/ac_nir_to_llvm.c b/src/amd/llvm/ac_nir_to_llvm.c
index 3d758759af7..02a640603f3 100644
--- a/src/amd/llvm/ac_nir_to_llvm.c
+++ b/src/amd/llvm/ac_nir_to_llvm.c
@@ -2540,7 +2540,7 @@ static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
 		const struct glsl_type *type = image_deref->type;
 		const nir_variable *var = nir_deref_instr_get_variable(image_deref);
 		dim = glsl_get_sampler_dim(type);
-		access = var->data.image.access;
+		access = var->data.access;
 		is_array = glsl_sampler_type_is_array(type);
 	}
 
@@ -2597,7 +2597,7 @@ static void visit_image_store(struct ac_nir_context *ctx,
 		const struct glsl_type *type = image_deref->type;
 		const nir_variable *var = nir_deref_instr_get_variable(image_deref);
 		dim = glsl_get_sampler_dim(type);
-		access = var->data.image.access;
+		access = var->data.access;
 		is_array = glsl_sampler_type_is_array(type);
 	}
 
diff --git a/src/amd/vulkan/radv_meta_fmask_expand.c b/src/amd/vulkan/radv_meta_fmask_expand.c
index a8dd4cf6966..607dc835a24 100644
--- a/src/amd/vulkan/radv_meta_fmask_expand.c
+++ b/src/amd/vulkan/radv_meta_fmask_expand.c
@@ -52,7 +52,7 @@ build_fmask_expand_compute_shader(struct radv_device *device, int samples)
 						       img_type, "out_img");
 	output_img->data.descriptor_set = 0;
 	output_img->data.binding = 0;
-	output_img->data.image.access = ACCESS_NON_READABLE;
+	output_img->data.access = ACCESS_NON_READABLE;
 
 	nir_ssa_def *invoc_id = nir_load_local_invocation_id(&b);
 	nir_ssa_def *wg_id = nir_load_work_group_id(&b);
diff --git a/src/compiler/glsl/gl_nir_link_uniforms.c b/src/compiler/glsl/gl_nir_link_uniforms.c
index ffddeb20b44..b68a8e56502 100644
--- a/src/compiler/glsl/gl_nir_link_uniforms.c
+++ b/src/compiler/glsl/gl_nir_link_uniforms.c
@@ -643,7 +643,7 @@ nir_link_uniform(struct gl_context *ctx,
 
          /* Set image access qualifiers */
          enum gl_access_qualifier image_access =
-            state->current_var->data.image.access;
+            state->current_var->data.access;
          const GLenum access =
             (image_access & ACCESS_NON_WRITEABLE) ?
             ((image_access & ACCESS_NON_READABLE) ? GL_NONE :
diff --git a/src/compiler/glsl/glsl_to_nir.cpp b/src/compiler/glsl/glsl_to_nir.cpp
index 9a82f97731a..5d93ac787c2 100644
--- a/src/compiler/glsl/glsl_to_nir.cpp
+++ b/src/compiler/glsl/glsl_to_nir.cpp
@@ -599,11 +599,11 @@ nir_visitor::visit(ir_variable *ir)
    var->data.explicit_binding = ir->data.explicit_binding;
    var->data.bindless = ir->data.bindless;
    var->data.offset = ir->data.offset;
+   var->data.access = (gl_access_qualifier)image_access;
 
    if (var->type->without_array()->is_image()) {
-      var->data.image.access = (gl_access_qualifier)image_access;
       var->data.image.format = ir->data.image_format;
-   } else {
+   } else if (var->data.mode == nir_var_shader_out) {
       var->data.xfb.buffer = ir->data.xfb_buffer;
       var->data.xfb.stride = ir->data.xfb_stride;
    }
@@ -862,7 +862,7 @@ deref_get_qualifier(nir_deref_instr *deref)
    nir_deref_path path;
    nir_deref_path_init(&path, deref, NULL);
 
-   unsigned qualifiers = path.path[0]->var->data.image.access;
+   unsigned qualifiers = path.path[0]->var->data.access;
 
    const glsl_type *parent_type = path.path[0]->type;
    for (nir_deref_instr **cur_ptr = &path.path[1]; *cur_ptr; cur_ptr++) {
diff --git a/src/compiler/nir/nir.c b/src/compiler/nir/nir.c
index f97c3175a22..d7bdc7ed4ca 100644
--- a/src/compiler/nir/nir.c
+++ b/src/compiler/nir/nir.c
@@ -2210,7 +2210,7 @@ nir_rewrite_image_intrinsic(nir_intrinsic_instr *intrin, nir_ssa_def *src,
 
    nir_intrinsic_set_image_dim(intrin, glsl_get_sampler_dim(deref->type));
    nir_intrinsic_set_image_array(intrin, glsl_sampler_type_is_array(deref->type));
-   nir_intrinsic_set_access(intrin, access | var->data.image.access);
+   nir_intrinsic_set_access(intrin, access | var->data.access);
    nir_intrinsic_set_format(intrin, var->data.image.format);
 
    nir_instr_rewrite_src(&intrin->instr, &intrin->src[0],
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index 942e647f94c..31d611a620d 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -431,6 +431,12 @@ typedef struct nir_variable {
       unsigned stream:9;
 
       /**
+       * Access flags for memory variables (SSBO/global), image uniforms, and
+       * bindless images in uniforms/inputs/outputs.
+       */
+      enum gl_access_qualifier access:8;
+
+      /**
        * output index for dual source blending.
        */
       unsigned index;
@@ -480,12 +486,7 @@ typedef struct nir_variable {
       unsigned offset;
 
       union {
-         /**
-          * ARB_shader_image_load_store qualifiers.
-          */
          struct {
-            enum gl_access_qualifier access:8;
-
             /** Image internal format if specified explicitly, otherwise GL_NONE. */
             GLenum16 format;
          } image;
diff --git a/src/compiler/nir/nir_deref.c b/src/compiler/nir/nir_deref.c
index b81edde8dac..74dd776aed6 100644
--- a/src/compiler/nir/nir_deref.c
+++ b/src/compiler/nir/nir_deref.c
@@ -401,7 +401,7 @@ deref_path_contains_coherent_decoration(nir_deref_path *path)
 {
    assert(path->path[0]->deref_type == nir_deref_type_var);
 
-   if (path->path[0]->var->data.image.access & ACCESS_COHERENT)
+   if (path->path[0]->var->data.access & ACCESS_COHERENT)
       return true;
 
    for (nir_deref_instr **p = &path->path[1]; *p; p++) {
diff --git a/src/compiler/nir/nir_opt_access.c b/src/compiler/nir/nir_opt_access.c
index 766f056568a..731b129ad97 100644
--- a/src/compiler/nir/nir_opt_access.c
+++ b/src/compiler/nir/nir_opt_access.c
@@ -158,12 +158,12 @@ process_variable(struct access_state *state, nir_variable *var)
       return false;
 
    /* Ignore variables we've already marked */
-   if (var->data.image.access & ACCESS_CAN_REORDER)
+   if (var->data.access & ACCESS_CAN_REORDER)
       return false;
 
-   if (!(var->data.image.access & ACCESS_NON_WRITEABLE) &&
+   if (!(var->data.access & ACCESS_NON_WRITEABLE) &&
        !_mesa_set_search(state->vars_written, var)) {
-      var->data.image.access |= ACCESS_NON_WRITEABLE;
+      var->data.access |= ACCESS_NON_WRITEABLE;
       return true;
    }
 
@@ -246,7 +246,7 @@ process_intrinsic(struct access_state *state, nir_intrinsic_instr *instr)
 
       /* Check if we were able to mark the whole variable non-writeable */
       if (!(nir_intrinsic_access(instr) & ACCESS_NON_WRITEABLE) &&
-          var->data.image.access & ACCESS_NON_WRITEABLE) {
+          var->data.access & ACCESS_NON_WRITEABLE) {
          progress = true;
          nir_intrinsic_set_access(instr,
                                   nir_intrinsic_access(instr) |
diff --git a/src/compiler/nir/nir_print.c b/src/compiler/nir/nir_print.c
index ca9dab79e96..8dbf701f8ef 100644
--- a/src/compiler/nir/nir_print.c
+++ b/src/compiler/nir/nir_print.c
@@ -458,7 +458,7 @@ print_var_decl(nir_variable *var, print_state *state)
            cent, samp, patch, inv, get_variable_mode_str(var->data.mode, false),
            glsl_interp_mode_name(var->data.interpolation));
 
-   enum gl_access_qualifier access = var->data.image.access;
+   enum gl_access_qualifier access = var->data.access;
    const char *const coher = (access & ACCESS_COHERENT) ? "coherent " : "";
    const char *const volat = (access & ACCESS_VOLATILE) ? "volatile " : "";
    const char *const restr = (access & ACCESS_RESTRICT) ? "restrict " : "";
diff --git a/src/compiler/spirv/vtn_variables.c b/src/compiler/spirv/vtn_variables.c
index 960bc01ef68..755d85642a0 100644
--- a/src/compiler/spirv/vtn_variables.c
+++ b/src/compiler/spirv/vtn_variables.c
@@ -1543,20 +1543,20 @@ apply_var_decoration(struct vtn_builder *b,
       var_data->read_only = true;
       break;
    case SpvDecorationNonReadable:
-      var_data->image.access |= ACCESS_NON_READABLE;
+      var_data->access |= ACCESS_NON_READABLE;
       break;
    case SpvDecorationNonWritable:
       var_data->read_only = true;
-      var_data->image.access |= ACCESS_NON_WRITEABLE;
+      var_data->access |= ACCESS_NON_WRITEABLE;
       break;
    case SpvDecorationRestrict:
-      var_data->image.access |= ACCESS_RESTRICT;
+      var_data->access |= ACCESS_RESTRICT;
       break;
    case SpvDecorationVolatile:
-      var_data->image.access |= ACCESS_VOLATILE;
+      var_data->access |= ACCESS_VOLATILE;
       break;
    case SpvDecorationCoherent:
-      var_data->image.access |= ACCESS_COHERENT;
+      var_data->access |= ACCESS_COHERENT;
       break;
    case SpvDecorationComponent:
       var_data->location_frac = dec->operands[0];
diff --git a/src/gallium/auxiliary/nir/tgsi_to_nir.c b/src/gallium/auxiliary/nir/tgsi_to_nir.c
index bd0b47a856f..ddc97973b03 100644
--- a/src/gallium/auxiliary/nir/tgsi_to_nir.c
+++ b/src/gallium/auxiliary/nir/tgsi_to_nir.c
@@ -1355,7 +1355,7 @@ get_image_var(struct ttn_compile *c, int binding,
       var = nir_variable_create(c->build.shader, nir_var_uniform, type, "image");
       var->data.binding = binding;
       var->data.explicit_binding = true;
-      var->data.image.access = access;
+      var->data.access = access;
       var->data.image.format = format;
       c->images[binding] = var;
    }
@@ -1920,7 +1920,7 @@ ttn_mem(struct ttn_compile *c, nir_alu_dest dest, nir_ssa_def **src)
       nir_deref_instr *image_deref = nir_build_deref_var(b, image);
       const struct glsl_type *type = image_deref->type;
 
-      nir_intrinsic_set_access(instr, image_deref->var->data.image.access);
+      nir_intrinsic_set_access(instr, image_deref->var->data.access);
 
       instr->src[0] = nir_src_for_ssa(&image_deref->dest.ssa);
       instr->src[1] = nir_src_for_ssa(src[addr_src_index]);
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
index bcabeacbbad..08365988069 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
@@ -3277,7 +3277,7 @@ Converter::convert(enum gl_access_qualifier access)
 CacheMode
 Converter::getCacheModeFromVar(const nir_variable *var)
 {
-   return convert(var->data.image.access);
+   return convert(var->data.access);
 }
 
 bool
diff --git a/src/intel/compiler/brw_nir_lower_image_load_store.c b/src/intel/compiler/brw_nir_lower_image_load_store.c
index b54cf32f443..a0a7cd8b06a 100644
--- a/src/intel/compiler/brw_nir_lower_image_load_store.c
+++ b/src/intel/compiler/brw_nir_lower_image_load_store.c
@@ -583,7 +583,7 @@ lower_image_store_instr(nir_builder *b,
    /* For write-only surfaces, we trust that the hardware can just do the
     * conversion for us.
     */
-   if (var->data.image.access & ACCESS_NON_READABLE)
+   if (var->data.access & ACCESS_NON_READABLE)
       return false;
 
    const enum isl_format image_fmt =
@@ -696,7 +696,7 @@ lower_image_size_instr(nir_builder *b,
    /* For write-only images, we have an actual image surface so we fall back
     * and let the back-end emit a TXS for this.
     */
-   if (var->data.image.access & ACCESS_NON_READABLE)
+   if (var->data.access & ACCESS_NON_READABLE)
       return false;
 
    /* If we have a matching typed format, then we have an actual image surface
diff --git a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
index f37b672543b..3fdc3520025 100644
--- a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
+++ b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
@@ -752,7 +752,7 @@ lower_image_intrinsic(nir_intrinsic_instr *intrin,
       nir_ssa_def_rewrite_uses(&intrin->dest.ssa, nir_src_for_ssa(desc));
    } else if (binding_offset > MAX_BINDING_TABLE_SIZE) {
       const bool write_only =
-         (var->data.image.access & ACCESS_NON_READABLE) != 0;
+         (var->data.access & ACCESS_NON_READABLE) != 0;
       nir_ssa_def *desc =
          build_descriptor_load(deref, 0, 2, 32, state);
       nir_ssa_def *handle = nir_channel(b, desc, write_only ? 1 : 0);
@@ -1321,7 +1321,7 @@ anv_nir_apply_pipeline_layout(const struct anv_physical_device *pdevice,
 
          /* NOTE: This is a uint8_t so we really do need to != 0 here */
          pipe_binding[i].write_only =
-            (var->data.image.access & ACCESS_NON_READABLE) != 0;
+            (var->data.access & ACCESS_NON_READABLE) != 0;
       }
    }
 
diff --git a/src/mesa/state_tracker/st_pbo.c b/src/mesa/state_tracker/st_pbo.c
index ea5ea43d054..639e0839245 100644
--- a/src/mesa/state_tracker/st_pbo.c
+++ b/src/mesa/state_tracker/st_pbo.c
@@ -546,7 +546,7 @@ create_fs_nir(struct st_context *st,
          nir_variable_create(b.shader, nir_var_uniform,
                              glsl_image_type(GLSL_SAMPLER_DIM_BUF, false,
                                              GLSL_TYPE_FLOAT), "img");
-      img_var->data.image.access = ACCESS_NON_READABLE;
+      img_var->data.access = ACCESS_NON_READABLE;
       img_var->data.explicit_binding = true;
       img_var->data.binding = 0;
       nir_deref_instr *img_deref = nir_build_deref_var(&b, img_var);




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