Mesa (master): freedreno/ir3: fixup when changing to mad.f16

GitLab Mirror gitlab-mirror at kemper.freedesktop.org
Wed Nov 20 14:38:28 UTC 2019


Module: Mesa
Branch: master
Commit: 407f8c71d3f3687f2fd134c42e5d12921e1c083d
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=407f8c71d3f3687f2fd134c42e5d12921e1c083d

Author: Hyunjun Ko <zzoon at igalia.com>
Date:   Fri Aug 30 08:29:10 2019 +0000

freedreno/ir3: fixup when changing to mad.f16

Reviewed-by: Rob Clark <robdclark at gmail.com>

---

 src/freedreno/ir3/ir3_ra.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/src/freedreno/ir3/ir3_ra.c b/src/freedreno/ir3/ir3_ra.c
index 67d8a93884e..c3d8e88f54a 100644
--- a/src/freedreno/ir3/ir3_ra.c
+++ b/src/freedreno/ir3/ir3_ra.c
@@ -982,7 +982,11 @@ static void fixup_half_instr_dst(struct ir3_instruction *instr)
 	case 3:
 		switch (instr->opc) {
 		case OPC_MAD_F32:
-			instr->opc = OPC_MAD_F16;
+			/* Available for that dest is half and srcs are full.
+			 * eg. mad.f32 hr0, r0.x, r0.y, r0.z
+			 */
+			if (instr->regs[1]->flags & IR3_REG_HALF)
+				instr->opc = OPC_MAD_F16;
 			break;
 		case OPC_SEL_B32:
 			instr->opc = OPC_SEL_B16;




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