Mesa (master): iris: Let isl decide the supported tiling in more situations

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Module: Mesa
Branch: master
Commit: da10fa9d63675dcdd789827cdb5b082140ec0621
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=da10fa9d63675dcdd789827cdb5b082140ec0621

Author: Jordan Justen <jordan.l.justen at intel.com>
Date:   Fri Apr 19 16:28:01 2019 -0700

iris: Let isl decide the supported tiling in more situations

Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
Suggested-by: Nanley Chery <nanley.g.chery at intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery at intel.com>

---

 src/gallium/drivers/iris/iris_resource.c | 15 ---------------
 1 file changed, 15 deletions(-)

diff --git a/src/gallium/drivers/iris/iris_resource.c b/src/gallium/drivers/iris/iris_resource.c
index cd411c3e6b8..eac329d9ba7 100644
--- a/src/gallium/drivers/iris/iris_resource.c
+++ b/src/gallium/drivers/iris/iris_resource.c
@@ -719,21 +719,6 @@ iris_resource_create_with_modifiers(struct pipe_screen *pscreen,
          return NULL;
       }
 
-      /* No modifiers - we can select our own tiling. */
-
-      if (has_depth) {
-         /* Depth must be Y-tiled */
-         tiling_flags = ISL_TILING_Y0_BIT;
-      } else if (templ->format == PIPE_FORMAT_S8_UINT) {
-         /* Stencil must be W-tiled */
-         tiling_flags = ISL_TILING_W_BIT;
-      } else if (templ->target == PIPE_BUFFER ||
-                 templ->target == PIPE_TEXTURE_1D ||
-                 templ->target == PIPE_TEXTURE_1D_ARRAY) {
-         /* Use linear for buffers and 1D textures */
-         tiling_flags = ISL_TILING_LINEAR_BIT;
-      }
-
       /* Use linear for staging buffers */
       if (templ->usage == PIPE_USAGE_STAGING ||
           templ->bind & (PIPE_BIND_LINEAR | PIPE_BIND_CURSOR) )