Mesa (master): freedreno/ir3: track sysval slot for inputs

GitLab Mirror gitlab-mirror at kemper.freedesktop.org
Fri Oct 18 22:03:26 UTC 2019


Module: Mesa
Branch: master
Commit: af817a44c15a387c920ec13a7f70aee4bd4a1a8c
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=af817a44c15a387c920ec13a7f70aee4bd4a1a8c

Author: Rob Clark <robdclark at chromium.org>
Date:   Fri Oct 11 11:35:53 2019 -0700

freedreno/ir3: track sysval slot for inputs

Will be needed for special handling of SYSTEM_VALUE_BARYCENTRIC_PIXEL
(ij_pix) when pre-fs texture fetch is enabled.

Signed-off-by: Rob Clark <robdclark at chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg at google.com>

---

 src/freedreno/ir3/ir3.h              | 7 +++++++
 src/freedreno/ir3/ir3_compiler_nir.c | 4 ++++
 src/freedreno/ir3/ir3_group.c        | 1 +
 3 files changed, 12 insertions(+)

diff --git a/src/freedreno/ir3/ir3.h b/src/freedreno/ir3/ir3.h
index b595202cbda..f7a87ee076a 100644
--- a/src/freedreno/ir3/ir3.h
+++ b/src/freedreno/ir3/ir3.h
@@ -267,6 +267,13 @@ struct ir3_instruction {
 		struct {
 			int off;              /* component/offset */
 		} fo;
+		struct {
+			/* for sysvals, identifies the sysval type.  Mostly so we can
+			 * identify the special cases where a sysval should not be DCE'd
+			 * (currently, just pre-fs texture fetch)
+			 */
+			gl_system_value sysval;
+		} input;
 	};
 
 	/* transient values used during various algorithms: */
diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c
index 21a9f57a381..081d4cf19ec 100644
--- a/src/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/freedreno/ir3/ir3_compiler_nir.c
@@ -68,6 +68,7 @@ create_input_compmask(struct ir3_context *ctx, unsigned n, unsigned compmask)
 	struct ir3_instruction *in;
 
 	in = ir3_instr_create(ctx->in_block, OPC_META_INPUT);
+	in->input.sysval = ~0;
 	ir3_reg_create(in, n, 0);
 
 	in->regs[0]->wrmask = compmask;
@@ -1197,6 +1198,9 @@ static void add_sysval_input_compmask(struct ir3_context *ctx,
 	unsigned r = regid(so->inputs_count, 0);
 	unsigned n = so->inputs_count++;
 
+	assert(instr->opc == OPC_META_INPUT);
+	instr->input.sysval = slot;
+
 	so->inputs[n].sysval = true;
 	so->inputs[n].slot = slot;
 	so->inputs[n].compmask = compmask;
diff --git a/src/freedreno/ir3/ir3_group.c b/src/freedreno/ir3/ir3_group.c
index 397f8d6f8a7..4ff362b9990 100644
--- a/src/freedreno/ir3/ir3_group.c
+++ b/src/freedreno/ir3/ir3_group.c
@@ -60,6 +60,7 @@ static void arr_insert_mov_in(void *arr, int idx, struct ir3_instruction *instr)
 	debug_assert(instr->regs_count == 1);
 
 	in = ir3_instr_create(instr->block, OPC_META_INPUT);
+	in->input.sysval = instr->input.sysval;
 	ir3_reg_create(in, instr->regs[0]->num, 0);
 
 	/* create src reg for meta:in and fixup to now be a mov: */




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