Mesa (master): intel/compiler: Set bits according to source file

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Module: Mesa
Branch: master
Commit: bf943bdf24be0e663aa866e26f06f9fddcbef155
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=bf943bdf24be0e663aa866e26f06f9fddcbef155

Author: Sagar Ghuge <sagar.ghuge at intel.com>
Date:   Fri Apr 19 13:37:17 2019 -0700

intel/compiler: Set bits according to source file

On Gen >= 12, if src0 or src2 holds immediate value, we need set
src[0/2]_is_imm bits instead of register file.

Signed-off-by: Sagar Ghuge <sagar.ghuge at intel.com>
Reviewed-by: Matt Turner <mattst88 at gmail.com>

---

 src/intel/compiler/brw_eu_emit.c | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c
index c3debfe4d3d..ecd3c34470c 100644
--- a/src/intel/compiler/brw_eu_emit.c
+++ b/src/intel/compiler/brw_eu_emit.c
@@ -848,9 +848,19 @@ brw_alu3(struct brw_codegen *p, unsigned opcode, struct brw_reg dest,
              src2.file == BRW_IMMEDIATE_VALUE);
 
       if (devinfo->gen >= 12) {
-         brw_inst_set_3src_a1_src0_reg_file(devinfo, inst, src0.file);
+         if (src0.file == BRW_IMMEDIATE_VALUE) {
+            brw_inst_set_3src_a1_src0_is_imm(devinfo, inst, 1);
+         } else {
+            brw_inst_set_3src_a1_src0_reg_file(devinfo, inst, src0.file);
+         }
+
          brw_inst_set_3src_a1_src1_reg_file(devinfo, inst, src1.file);
-         brw_inst_set_3src_a1_src2_reg_file(devinfo, inst, src2.file);
+
+         if (src2.file == BRW_IMMEDIATE_VALUE) {
+            brw_inst_set_3src_a1_src2_is_imm(devinfo, inst, 1);
+         } else {
+            brw_inst_set_3src_a1_src2_reg_file(devinfo, inst, src2.file);
+         }
       } else {
          brw_inst_set_3src_a1_src0_reg_file(devinfo, inst,
                                             src0.file == BRW_GENERAL_REGISTER_FILE ?