Mesa (master): iris: Define MCS_CCS state transitions and usages

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Module: Mesa
Branch: master
Commit: d1566323747da7bf3aa0fe6fcb387b956c9d0954
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=d1566323747da7bf3aa0fe6fcb387b956c9d0954

Author: Sagar Ghuge <sagar.ghuge at intel.com>
Date:   Wed Sep 18 13:15:47 2019 -0700

iris: Define MCS_CCS state transitions and usages

v2: 1) Fix assertion check (Nanley Chery)
    2) Correct commit subject (Nanley Chery)

Signed-off-by: Sagar Ghuge <sagar.ghuge at intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery at intel.com>

---

 src/gallium/drivers/iris/iris_resolve.c  | 14 +++++++++-----
 src/gallium/drivers/iris/iris_resource.c |  1 +
 2 files changed, 10 insertions(+), 5 deletions(-)

diff --git a/src/gallium/drivers/iris/iris_resolve.c b/src/gallium/drivers/iris/iris_resolve.c
index f4b5002bd5b..d40ec265f57 100644
--- a/src/gallium/drivers/iris/iris_resolve.c
+++ b/src/gallium/drivers/iris/iris_resolve.c
@@ -522,7 +522,7 @@ iris_mcs_partial_resolve(struct iris_context *ice,
    //DBG("%s to mt %p layers %u-%u\n", __FUNCTION__, mt,
        //start_layer, start_layer + num_layers - 1);
 
-   assert(res->aux.usage == ISL_AUX_USAGE_MCS);
+   assert(isl_aux_usage_has_mcs(res->aux.usage));
 
    struct blorp_surf surf;
    iris_blorp_surf_for_resource(&ice->vtbl, &surf, &res->base, res->aux.usage,
@@ -989,7 +989,7 @@ iris_resource_prepare_mcs_access(struct iris_context *ice,
                                  enum isl_aux_usage aux_usage,
                                  bool fast_clear_supported)
 {
-   assert(aux_usage == ISL_AUX_USAGE_MCS);
+   assert(isl_aux_usage_has_mcs(aux_usage));
 
    switch (iris_resource_get_aux_state(res, 0, layer)) {
    case ISL_AUX_STATE_CLEAR:
@@ -1018,7 +1018,7 @@ iris_resource_finish_mcs_write(struct iris_context *ice,
                                uint32_t layer,
                                enum isl_aux_usage aux_usage)
 {
-   assert(aux_usage == ISL_AUX_USAGE_MCS);
+   assert(isl_aux_usage_has_mcs(aux_usage));
 
    switch (iris_resource_get_aux_state(res, 0, layer)) {
    case ISL_AUX_STATE_CLEAR:
@@ -1162,6 +1162,7 @@ iris_resource_prepare_access(struct iris_context *ice,
       break;
 
    case ISL_AUX_USAGE_MCS:
+   case ISL_AUX_USAGE_MCS_CCS:
       assert(start_level == 0 && num_levels == 1);
       const uint32_t level_layers =
          miptree_layer_range_length(res, 0, start_layer, num_layers);
@@ -1220,6 +1221,7 @@ iris_resource_finish_write(struct iris_context *ice,
       break;
 
    case ISL_AUX_USAGE_MCS:
+   case ISL_AUX_USAGE_MCS_CCS:
       for (uint32_t a = 0; a < num_layers; a++) {
          iris_resource_finish_mcs_write(ice, res, start_layer + a,
                                         aux_usage);
@@ -1360,7 +1362,8 @@ iris_resource_texture_aux_usage(struct iris_context *ice,
       break;
 
    case ISL_AUX_USAGE_MCS:
-      return ISL_AUX_USAGE_MCS;
+   case ISL_AUX_USAGE_MCS_CCS:
+      return res->aux.usage;
 
    case ISL_AUX_USAGE_CCS_D:
    case ISL_AUX_USAGE_CCS_E:
@@ -1441,7 +1444,8 @@ iris_resource_render_aux_usage(struct iris_context *ice,
 
    switch (res->aux.usage) {
    case ISL_AUX_USAGE_MCS:
-      return ISL_AUX_USAGE_MCS;
+   case ISL_AUX_USAGE_MCS_CCS:
+      return res->aux.usage;
 
    case ISL_AUX_USAGE_CCS_D:
    case ISL_AUX_USAGE_CCS_E:
diff --git a/src/gallium/drivers/iris/iris_resource.c b/src/gallium/drivers/iris/iris_resource.c
index 5a3c271e559..0050d2615d6 100644
--- a/src/gallium/drivers/iris/iris_resource.c
+++ b/src/gallium/drivers/iris/iris_resource.c
@@ -518,6 +518,7 @@ iris_resource_configure_aux(struct iris_screen *screen,
       initial_state = ISL_AUX_STATE_AUX_INVALID;
       break;
    case ISL_AUX_USAGE_MCS:
+   case ISL_AUX_USAGE_MCS_CCS:
       /* The Ivybridge PRM, Vol 2 Part 1 p326 says:
        *
        *    "When MCS buffer is enabled and bound to MSRT, it is required