Mesa (master): intel/vec4: Set brw_stage_prog_data::has_ubo_pull

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Module: Mesa
Branch: master
Commit: 24c0545b2d5d79132ee48643886cd3eb285beb6f
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=24c0545b2d5d79132ee48643886cd3eb285beb6f

Author: Jason Ekstrand <jason at jlekstrand.net>
Date:   Tue Oct 29 17:28:18 2019 -0500

intel/vec4: Set brw_stage_prog_data::has_ubo_pull

In 0e4a75f917, Ken added a flag brw_stage_prog_data which indicates
whether any UBO pulls ever occur.  Unfortunately, he neglected to set
the bit in the vec4 back-end.  This was fine at the time because the
optimization was intended for iris which does not support gen7 and using
the vec4 back-end on Gen8+ requires an environment variable.  We want to
use this in Vulkan which does support Gen7 so we want the information
from the vec4 back-end as well as scalar.

Fixes: 0e4a75f917 "intel/compiler: Record whether any pull constant..."
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

---

 src/intel/compiler/brw_vec4_nir.cpp | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/intel/compiler/brw_vec4_nir.cpp b/src/intel/compiler/brw_vec4_nir.cpp
index 7bc31755609..3036abcb814 100644
--- a/src/intel/compiler/brw_vec4_nir.cpp
+++ b/src/intel/compiler/brw_vec4_nir.cpp
@@ -627,6 +627,8 @@ vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr)
    case nir_intrinsic_load_ubo: {
       src_reg surf_index;
 
+      prog_data->base.has_ubo_pull = true;
+
       dest = get_nir_dest(instr->dest);
 
       if (nir_src_is_const(instr->src[0])) {