Mesa (master): amd: move adaptive sync to performance section, as it is defined in xmlpool

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Module: Mesa
Branch: master
Commit: 4ad99ee9616f86eff96f4840354c64a60e341a6b
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4ad99ee9616f86eff96f4840354c64a60e341a6b

Author: Eric Engestrom <eric.engestrom at intel.com>
Date:   Fri Aug 30 17:03:12 2019 +0100

amd: move adaptive sync to performance section, as it is defined in xmlpool

Fixes: 3844ed8d44677588bc29 ("radv: Add adaptive_sync driconfig option and enable it by default.")
Fixes: e260493f2ab2483e5a55 ("radeonsi: Enable adaptive_sync by default for radeon")
Signed-off-by: Eric Engestrom <eric.engestrom at intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>

---

 src/amd/vulkan/radv_device.c                    | 2 +-
 src/gallium/drivers/radeonsi/driinfo_radeonsi.h | 5 +----
 2 files changed, 2 insertions(+), 5 deletions(-)

diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index b9d6ccc4c03..c8e0d5f7fea 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -556,7 +556,7 @@ static int radv_get_instance_extension_index(const char *name)
 
 static const char radv_dri_options_xml[] =
 DRI_CONF_BEGIN
-	DRI_CONF_SECTION_QUALITY
+	DRI_CONF_SECTION_PERFORMANCE
 		DRI_CONF_ADAPTIVE_SYNC("true")
 	DRI_CONF_SECTION_END
 DRI_CONF_END;
diff --git a/src/gallium/drivers/radeonsi/driinfo_radeonsi.h b/src/gallium/drivers/radeonsi/driinfo_radeonsi.h
index 000a300746e..ff81a9bab47 100644
--- a/src/gallium/drivers/radeonsi/driinfo_radeonsi.h
+++ b/src/gallium/drivers/radeonsi/driinfo_radeonsi.h
@@ -1,9 +1,6 @@
 // DriConf options specific to radeonsi
-DRI_CONF_SECTION_QUALITY
-    DRI_CONF_ADAPTIVE_SYNC("true")
-DRI_CONF_SECTION_END
-
 DRI_CONF_SECTION_PERFORMANCE
+    DRI_CONF_ADAPTIVE_SYNC("true")
     DRI_CONF_RADEONSI_ENABLE_SISCHED("false")
     DRI_CONF_RADEONSI_ASSUME_NO_Z_FIGHTS("false")
     DRI_CONF_RADEONSI_COMMUTATIVE_BLEND_ADD("false")