Mesa (master): radeonsi: handle NO_DCC early

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Module: Mesa
Branch: master
Commit: 30a1dd0ee6ca6c89fe7c89996e399298ee1eef5c
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=30a1dd0ee6ca6c89fe7c89996e399298ee1eef5c

Author: Marek Olšák <marek.olsak at amd.com>
Date:   Tue Aug 27 20:32:46 2019 -0400

radeonsi: handle NO_DCC early

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>

---

 src/gallium/drivers/radeonsi/si_texture.c | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_texture.c b/src/gallium/drivers/radeonsi/si_texture.c
index 1f7cab6b2f3..baa34d0b408 100644
--- a/src/gallium/drivers/radeonsi/si_texture.c
+++ b/src/gallium/drivers/radeonsi/si_texture.c
@@ -298,6 +298,13 @@ static int si_init_surface(struct si_screen *sscreen,
 	    ptex->nr_storage_samples >= 2)
 		flags |= RADEON_SURF_DISABLE_DCC;
 
+	/* Shared textures must always set up DCC.
+	 * If it's not present, it will be disabled by
+	 * si_get_opaque_metadata later.
+	 */
+	if (!is_imported && (sscreen->debug_flags & DBG(NO_DCC)))
+		flags |= RADEON_SURF_DISABLE_DCC;
+
 	if (ptex->bind & PIPE_BIND_SCANOUT || is_scanout) {
 		/* This should catch bugs in gallium users setting incorrect flags. */
 		assert(ptex->nr_samples <= 1 &&
@@ -1384,12 +1391,7 @@ si_texture_create_object(struct pipe_screen *screen,
 			tex->cmask_buffer = &tex->buffer;
 		}
 
-		/* Shared textures must always set up DCC here.
-		 * If it's not present, it will be disabled by
-		 * si_get_opaque_metadata later.
-		 */
 		if (tex->surface.dcc_size &&
-		    (buf || !(sscreen->debug_flags & DBG(NO_DCC))) &&
 		    (sscreen->info.use_display_dcc_unaligned ||
 		     sscreen->info.use_display_dcc_with_retile_blit ||
 		     !(tex->surface.flags & RADEON_SURF_SCANOUT))) {