Mesa (master): freedreno/a6xx: don't tile things that are too small

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Module: Mesa
Branch: master
Commit: 85a23a8991cfb78960362114bf16304ea987f7f4
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=85a23a8991cfb78960362114bf16304ea987f7f4

Author: Rob Clark <robdclark at chromium.org>
Date:   Mon Sep  9 16:19:40 2019 -0700

freedreno/a6xx: don't tile things that are too small

If the lowest (largest) mipmap level is too small to tile, then don't
bother pretending.

Note that this requires initializing pipe->screen before
fd_resource_level_linear() is called.

Signed-off-by: Rob Clark <robdclark at chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg at google.com>

---

 src/gallium/drivers/freedreno/a6xx/fd6_blitter.c   |  6 ++++++
 src/gallium/drivers/freedreno/freedreno_resource.c | 10 +++++-----
 2 files changed, 11 insertions(+), 5 deletions(-)

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c
index 68cc4e7ab69..9e145e55e5b 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c
@@ -718,6 +718,12 @@ fd6_blitter_init(struct pipe_context *pctx)
 unsigned
 fd6_tile_mode(const struct pipe_resource *tmpl)
 {
+	/* if the mipmap level 0 is still too small to be tiled, then don't
+	 * bother pretending:
+	 */
+	if (fd_resource_level_linear(tmpl, 0))
+		return TILE6_LINEAR;
+
 	/* basically just has to be a format we can blit, so uploads/downloads
 	 * via linear staging buffer works:
 	 */
diff --git a/src/gallium/drivers/freedreno/freedreno_resource.c b/src/gallium/drivers/freedreno/freedreno_resource.c
index 4d188c24d64..fcc8fc66189 100644
--- a/src/gallium/drivers/freedreno/freedreno_resource.c
+++ b/src/gallium/drivers/freedreno/freedreno_resource.c
@@ -977,16 +977,16 @@ fd_resource_create_with_modifiers(struct pipe_screen *pscreen,
 
 	allow_ubwc &= !(fd_mesa_debug & FD_DBG_NOUBWC);
 
+	pipe_reference_init(&prsc->reference, 1);
+
+	prsc->screen = pscreen;
+
 	if (screen->tile_mode &&
 			(tmpl->target != PIPE_BUFFER) &&
 			!linear) {
-		rsc->tile_mode = screen->tile_mode(tmpl);
+		rsc->tile_mode = screen->tile_mode(prsc);
 	}
 
-	pipe_reference_init(&prsc->reference, 1);
-
-	prsc->screen = pscreen;
-
 	util_range_init(&rsc->valid_buffer_range);
 
 	rsc->internal_format = format;