Mesa (staging/19.2): 29 new commits
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Wed Sep 18 16:38:59 UTC 2019
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3fbe503a4366292c08ad7a39d620cd328d9723e6
Author: Dylan Baker <dylan at pnwbakers.com>
Date: Wed Sep 18 09:03:55 2019 -0700
cherry-ignore: Add patches
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0b166c7c00e4809153df5c8eef65a336c2c6b58a
Author: Christian Gmeiner <christian.gmeiner at gmail.com>
Date: Tue Jun 18 00:52:19 2019 +0200
etnaviv: disable ARB_shadow
Looks like only HALT2 GPUs have support for it but that is not yet
implemented so disable ARB_shadow for now.
Signed-off-by: Christian Gmeiner <christian.gmeiner at gmail.com>
Reviewed-by: Jonathan Marek <jonathan at marek.ca>
Reviewed-by: Eric Anholt <eric at anholt.net>
(cherry picked from commit 8d5f905faad76a46c732dc43c4009cbf0f5da170)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=aacd1a3ade7178526565902c17c785573cb4584a
Author: Christian Gmeiner <christian.gmeiner at gmail.com>
Date: Tue Jun 18 00:54:47 2019 +0200
Revert "gallium: remove PIPE_CAP_TEXTURE_SHADOW_MAP"
There are GPUs that do not support this feature.
This reverts commit e871abe452ad40efcccb0bab6b88fc31d0551e29
Signed-off-by: Christian Gmeiner <christian.gmeiner at gmail.com>
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
Reviewed-by: Eric Anholt <eric at anholt.net>
(cherry picked from commit dcc0e23438f3e5929c2ef74d57e8207be25ecb41)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d0832208798987d2be9ba6acd2dbf1d996d7905a
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date: Wed Sep 18 16:21:57 2019 +0200
radv: fix loading 64-bit GS inputs
We have to load 2 32-bit integer and to cast correctly.
This fixes crashes with gs-double-interpolator.vk_shader_test.
Cc: 19.2 <mesa-stable at lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111734
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
(cherry picked from commit 68820007fddbb5b79f1b2b08e66ef14092053a95)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9bf80c2b53eb786978f28a1f295c0ee440867f93
Author: Bas Nieuwenhuizen <basni at chromium.org>
Date: Wed Sep 18 14:11:47 2019 +0200
tu: Set up glsl types.
Addresses this assert:
deqp-vk: ../mesa-freedreno-9999/src/compiler/glsl_types.cpp:1244: static const glsl_type *glsl_type::get_interface_instance(const glsl_struct_field *, unsigned int, enum glsl_interface_packing, bool, const char *): Assertion `glsl_type_users > 0' failed.
running dEQP-VK.api.smoke.triangle .
Fixes: 624789e3708 "compiler/glsl: handle case where we have multiple users for types"
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
(cherry picked from commit 7999e10cab93fe854fbc7accd4d8cf2e60726b75)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fa59ef37ed0a5a1fd585567a2267b0fd9b51e155
Author: Haihao Xiang <haihao.xiang at intel.com>
Date: Mon Sep 16 14:52:56 2019 +0800
i965: support AYUV/XYUV for external import only
Fixes: 89785e2d56e7fa ("i965: add support for sampling from AYUV")
Fixes: 7cab8d3661f243 ("i965: Add support for sampling from XYUV images")
Cc: Vivek Kasireddy <vivek.kasireddy at intel.com>
Cc: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Signed-off-by: Haihao Xiang <haihao.xiang at intel.com>
Reviewed-by: Tapani Pälli <tapani.palli at intel.com>
(cherry picked from commit 8a9b81ab9dbd44ea4ce87b8fb8ebc4ec3530a3f9)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0ff13c291b5ccaa0b6683bd32f081f00614f8e44
Author: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
Date: Tue Dec 4 16:41:36 2018 +0100
intel/nir: do not apply the fsin and fcos trig workarounds for consts
If we have fsin or fcos trigonometric operations with constant values
as inputs, we will multiply the result by 0.99997 in
brw_nir_apply_trig_workarounds, making the result wrong.
Adjusting the rules so they do not apply to const values we let a
later constant fold to deal with it.
v2:
- Do not early constant fold but only apply the trig workaround for
non constants (Caio).
- Add fixes tag to commit log (Caio).
Fixes: bfd17c76c12 "i965: Port INTEL_PRECISE_TRIG=1 to NIR."
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
Signed-off-by: Andres Gomez <agomez at igalia.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
(cherry picked from commit 3c474f851313db5318d727d017b763ea2cb01e6d)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=71fafc13b9491f4ccc75fa821008fb863ffdb033
Author: Dylan Baker <dylan at pnwbakers.com>
Date: Wed Sep 18 09:10:19 2019 -0700
Bump version for 19.2.0-rc4
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e2bb51a99bec2640a5dbec600b78980f90a02834
Author: Marek Olšák <marek.olsak at amd.com>
Date: Tue Sep 17 16:00:33 2019 -0400
radeonsi: add Navi12 PCI ID
trivial and urgent
Cc: 19.2 <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 83f195414a2e89bd9f549dacc04365f67e5bd110)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2e9a37cf1cf47f9108595e0eefe333844b4caa9f
Author: Tapani Pälli <tapani.palli at intel.com>
Date: Tue Sep 17 10:21:24 2019 +0300
iris: close screen fd on iris_destroy_screen
Otherwise it never gets closed, this fixes errors seen with deqp-egl
where we end up opening 1024 files.
Fixes: 2dce0e94 ("iris: Initial commit of a new 'iris' driver for Intel Gen8+ GPUs.")
Signed-off-by: Tapani Pälli <tapani.palli at intel.com>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
(cherry picked from commit 631255387f0469910db99eccbfbaa63345425739)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b94ab6f5e33da7c3cf6c1194313f091795abff9d
Author: Rhys Perry <pendingchaos02 at gmail.com>
Date: Mon Sep 2 17:40:43 2019 +0100
radv: always emit a position export in gs copy shaders
Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com>
Fixes: f8d0337299f ('radv: add multiple streams support for the GS copy shader')
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
(cherry picked from commit ffabcbba606eacb8c955bf9e0424be8ca242b53f)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b2a09536ff9075b5bcf0e7d88ee401e24c2706ff
Author: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Date: Mon Sep 16 18:01:28 2019 +0300
drirc: include unreal engine version 0 to 23
This was meant to include up to version 23.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Fixes: 0616b7ac90 ("vulkan: add vk_x11_strict_image_count option")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111522
Reviewed-by: Eric Engestrom <eric.engestrom at intel.com>
(cherry picked from commit dcf13fbac9d28ac25fc2c42f87733740009ce621)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3aeddc1f2f7cf8f9fe9f66dd742e06e89d02d1ad
Author: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Date: Mon Sep 16 17:47:12 2019 +0300
util/xmlconfig: fix regexp compile failure check
This is embarrasing...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Fixes: 04dc6074cf ("driconfig: add a new engine name/version parameter")
Reviewed-by: Eric Engestrom <eric.engestrom at intel.com>
(cherry picked from commit 10206ba17b3f685035418b2ab99b10ea261600e1)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d5fe3f73fc1cfa8093955f48e6ecc0e447126cf9
Author: Sergii Romantsov <sergii.romantsov at globallogic.com>
Date: Thu Sep 12 15:28:45 2019 +0300
nir/large_constants: more careful data copying
A filed of nir_variable.location may be equel to -1.
That may cause copying to invalid address of list-node,
making some internal fields corrupted.
Patch fixes segfault during freeing context due to
corrupted address of ralloc_header.destructor.
v2: copy data if var is constant (Connor Abbott)
CC: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
Fixes: b6d475356846 (nir/large_constants: De-duplicate constants)
Signed-off-by: Sergii Romantsov <sergii.romantsov at globallogic.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111676
Reviewed-by: Connor Abbott <cwabbott0 at gmail.com>
(cherry picked from commit c7b2a2fd363f57bb1ab4d7d6bad786af7e2924ef)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5650308d08a907b0a4545e9f912659d91ba6fd96
Author: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Date: Thu Sep 5 23:54:53 2019 +0300
vulkan: add vk_x11_strict_image_count option
This option strictly allocate the minImageCount given by the
application at swapchain creation.
This works around application that do not deal with the fact that the
implementation allocates more images than the minimum specified.
v2: Add values in default drirc (Bas)
v3: specify engine name/version (Lionel)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111522
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Reviewed-by: Eric Engestrom <eric.engestrom at intel.com>
Cc: 19.2 <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 0616b7ac90cf4f86bb409d34101e3a3cceac8cbe)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fbd96932d6f8a9add3e81ddd8aa42b327816b02a
Author: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Date: Sun Sep 8 12:59:32 2019 +0300
driconfig: add a new engine name/version parameter
Vulkan applications can register with the following structure :
typedef struct VkApplicationInfo {
VkStructureType sType;
const void* pNext;
const char* pApplicationName;
uint32_t applicationVersion;
const char* pEngineName;
uint32_t engineVersion;
uint32_t apiVersion;
} VkApplicationInfo;
This enables the Vulkan implementations to apply workarounds based off
matching this description.
Here we add a new parameter for matching the driconfig options with
the following :
<device driver="anv">
<application engine_name_match="MyOwnEngine.*" engine_versions="10:12,40:42">
<option name="blaaah" value="true" />
</application>
</device>
v2: switch engine name match to use regexps
v3: Verify that the regexec returns REG_NOMATCH for match failure (Eric)
v4: Add missing bit that went to the following commit (Eric)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom at intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Cc: 19.2 <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 04dc6074cf7f651b720868e0ba24362b585d1b31)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=82fc77b52128f95c1f6c59bdf8e3ae85d4758d05
Author: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Date: Sun Sep 8 12:57:16 2019 +0300
radv: store engine name
We'll use this later for a new driconfig matching parameter.
v2: Avoid leak in device creation error case (Bas)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom at intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Cc: 19.2 <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 6d5f11ab345b05759c22acbcd2f79928311689e3)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=78c34c3bfb8503b0f283fc509e47c35df8d664b4
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Fri Sep 13 02:32:25 2019 -0700
iris: Initialize ice->state.prim_mode to an invalid value
It was calloc'd to 0 which is PIPE_PRIM_POINTS, which means that we
fail to notice an initial primitive of points being new, and fail at
updating the "primitive is points or lines" field.
We do not need to reset this on device loss because we're tracking
the last primitive mode sent to us on the CPU via draw_vbo, not the
last primitive mode sent to the GPU.
Fixes several tests:
- dEQP-GLES3.functional.clipping.point.wide_point_clip
- dEQP-GLES3.functional.clipping.point.wide_point_clip_viewport_center
- dEQP-GLES3.functional.clipping.point.wide_point_clip_viewport_corner
Fixes: dcfca0af7c5 ("iris: Set XY Clipping correctly.")
(cherry picked from commit c9fb704f7277b1c1303d28d35c8e145d5b55ebce)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cd0402c58205c841f6a9b3184dd642f87fafa1bd
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date: Thu Sep 12 15:58:25 2019 +0200
radv: fix allocating number of user sgprs if streamout is used
streamout_buffers is assigned after that function, so the previous
fix was completely wrong. This probably fix something when streamout
buffers and push constants are used/inlined in the same shader.
Fixes: 378e2d24143 ("radv: fix computing number of user SGPRs for streamout buffers")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
(cherry picked from commit 8137df3a46abc6aa6ad0c7179d042e76ca2b2299)
[Juan A. Suarez: fix the structure usage]
Signed-off-by: Juan A. Suarez Romero <jasuarez at igalia.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=110dc21ed3a7e5a46a3d1d35ea2a3bf062e6e50f
Author: Iago Toral Quiroga <itoral at igalia.com>
Date: Tue Sep 10 13:46:25 2019 +0200
v3d: make sure we have enough space in the CL for the primitive counts packet
Fixes: 0f2d1dfe65 ("v3d: use the GPU to record primitives written to transform feedback")
Reviewed-by: Eric Anholt <eric at anholt.net>
(cherry picked from commit b9a07eed004c8c53f97d6d41e6816f1998d8dd8b)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cfcb96da38d845e2b8161e0acfe004fb426c8f7f
Author: Jason Ekstrand <jason at jlekstrand.net>
Date: Fri Sep 6 19:34:42 2019 -0500
intel/fs: Handle UNDEF in split_virtual_grfs
When the UNDEF instruction was added, we didn't do anything special in
split_virtual_grfs. This mean that anything with an UNDEF wasn't
getting split which causes problems for the compiler. Among other
things, it makes RA harder because things are in bigger chunks. It also
meant that dvec4s weren't getting split which means that they are larger
than the maximum register size.
Shader-db results on Kaby Lake:
total instructions in shared programs: 14959202 -> 14960035 (<.01%)
instructions in affected programs: 96197 -> 97030 (0.87%)
helped: 140
HURT: 128
helped stats (abs) min: 1 max: 17 x̄: 1.62 x̃: 1
helped stats (rel) min: 0.09% max: 6.15% x̄: 0.65% x̃: 0.45%
HURT stats (abs) min: 1 max: 825 x̄: 8.28 x̃: 1
HURT stats (rel) min: 0.13% max: 139.83% x̄: 1.70% x̃: 0.50%
95% mean confidence interval for instructions value: -2.96 9.18
95% mean confidence interval for instructions %-change: -0.56% 1.51%
Inconclusive result (value mean confidence interval includes 0).
total loops in shared programs: 4372 -> 4372 (0.00%)
loops in affected programs: 0 -> 0
helped: 0
HURT: 0
total cycles in shared programs: 352646771 -> 352840997 (0.06%)
cycles in affected programs: 218600800 -> 218795026 (0.09%)
helped: 21167
HURT: 21411
helped stats (abs) min: 1 max: 2924 x̄: 36.89 x̃: 10
helped stats (rel) min: <.01% max: 41.90% x̄: 2.97% x̃: 0.98%
HURT stats (abs) min: 1 max: 26027 x̄: 45.54 x̃: 10
HURT stats (rel) min: <.01% max: 324.46% x̄: 3.88% x̃: 1.06%
95% mean confidence interval for cycles value: 2.87 6.26
95% mean confidence interval for cycles %-change: 0.40% 0.55%
Cycles are HURT.
total spills in shared programs: 8840 -> 8953 (1.28%)
spills in affected programs: 126 -> 239 (89.68%)
helped: 1
HURT: 2
total fills in shared programs: 21782 -> 21914 (0.61%)
fills in affected programs: 431 -> 563 (30.63%)
helped: 1
HURT: 3
LOST: 0
GAINED: 5
Shader-db results on Haswell:
total instructions in shared programs: 13320918 -> 13320769 (<.01%)
instructions in affected programs: 40998 -> 40849 (-0.36%)
helped: 146
HURT: 56
helped stats (abs) min: 1 max: 8 x̄: 2.73 x̃: 2
helped stats (rel) min: 0.16% max: 8.60% x̄: 2.52% x̃: 2.22%
HURT stats (abs) min: 2 max: 23 x̄: 4.45 x̃: 4
HURT stats (rel) min: 0.21% max: 10.26% x̄: 6.83% x̃: 10.26%
95% mean confidence interval for instructions value: -1.26 -0.21
95% mean confidence interval for instructions %-change: -0.62% 0.77%
Inconclusive result (%-change mean confidence interval includes 0).
total loops in shared programs: 4373 -> 4373 (0.00%)
loops in affected programs: 0 -> 0
helped: 0
HURT: 0
total cycles in shared programs: 374518258 -> 374384193 (-0.04%)
cycles in affected programs: 231101954 -> 230967889 (-0.06%)
helped: 21427
HURT: 19438
helped stats (abs) min: 1 max: 2035 x̄: 31.09 x̃: 8
helped stats (rel) min: <.01% max: 40.95% x̄: 2.42% x̃: 0.86%
HURT stats (abs) min: 1 max: 20875 x̄: 27.38 x̃: 8
HURT stats (rel) min: <.01% max: 59.09% x̄: 2.49% x̃: 0.80%
95% mean confidence interval for cycles value: -4.49 -2.07
95% mean confidence interval for cycles %-change: -0.14% -0.04%
Cycles are helped.
total spills in shared programs: 23406 -> 23411 (0.02%)
spills in affected programs: 3 -> 8 (166.67%)
helped: 0
HURT: 2
total fills in shared programs: 34845 -> 34850 (0.01%)
fills in affected programs: 3 -> 8 (166.67%)
helped: 0
HURT: 2
LOST: 0
GAINED: 0
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111566
Fixes: f4ef34f207d1 "intel/fs: Add an UNDEF instruction to avoid..."
Reviewed-by: Francisco Jerez <currojerez at riseup.net>
(cherry picked from commit acfa2340e60f83f927c8f4426773580d34239c18)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b0b63d959342c9f06556aa1d93c62f6c5841edea
Author: Dylan Baker <dylan at pnwbakers.com>
Date: Thu Sep 12 09:14:20 2019 -0700
add patches to be ignored
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5eba28227cbc02789c132af159975c13ab868f25
Author: Danylo Piliaiev <danylo.piliaiev at globallogic.com>
Date: Wed Sep 4 16:43:17 2019 +0300
tgsi_to_nir: Translate TGSI_INTERPOLATE_COLOR as INTERP_MODE_NONE
Translating TGSI_INTERPOLATE_COLOR as INTERP_MODE_SMOOTH made
it for drivers impossible to have flatshaded color inputs.
Translate it to INTERP_MODE_NONE which drivers interpret as
smooth or flat depending on flatshading state.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111467
Fixes: 770faf54 ("tgsi_to_nir: Improve interpolation modes.")
Signed-off-by: Danylo Piliaiev <danylo.piliaiev at globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
Reviewed-by: Eric Anholt <eric at anholt.net>
(cherry picked from commit 175c32e9bdc8b7b9c43f605cb59cd82415075f67)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f9ef2b43751f5fcb73786a9b897096b7eda2b492
Author: Dylan Baker <dylan at pnwbakers.com>
Date: Tue Sep 10 13:35:08 2019 -0700
meson: don't generate file into subdirs
This is unsupported by meson and may become a hard error in the future.
Fixes: 5adfc8602c639827af0ba9a1059bd165a3ae49e7
("lima/ppir: move sin/cos input scaling into NIR")
Reviewed-by: Vasily Khoruzhick <anarsoul at gmail.com>
(cherry picked from commit 52cf2d05a743a4cb2a5a8e1a35f2f0309999a839)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b85d10e14b76575a3a237b2de0775f47e849cc59
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Sep 9 07:23:22 2019 -0700
gallium: Fix util_format_get_depth_only
This is a pipe format, not a boolean.
Fixes: 5849e0612cc ("gallium/auxiliary: Add util_format_get_depth_only() helper.")
Reviewed-by: Tapani Pälli <tapani.palli at intel.com>
(cherry picked from commit c6d40b5182daf1361686215d31d3c0345e0992f2)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7882268cc9402487e0659113d67d6412d6f42f55
Author: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
Date: Wed Aug 21 10:04:56 2019 -0700
glsl/nir: Avoid overflow when setting max_uniform_location
Don't use the UNMAPPED_UNIFORM_LOC (-1) to set the unsigned
max_uniform_location. Those unmapped uniforms don't have to be
accounted at this point.
Fixes: 7a9e5cdfbb9 ("nir/linker: Add gl_nir_link_uniforms()")
Reviewed-by: Alejandro Piñeiro <apinheiro at igalia.com>
(cherry picked from commit 4f33f96c4517f86f6f720f745cd49f8a0754393b)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4eabbc04f2fdc479bb30cb1b17c84b099285ae1c
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Tue Sep 10 09:04:20 2019 -0700
iris: Fix constant buffer sizes for non-UBOs
Since the system value refactor, we've accidentally only been setting
cbuf->buffer_size in the UBO case, and not in the uploaded-constants
case. We use cbuf->buffer_size to fill out the SURFACE_STATE entry,
so it needs to be initialized in both cases.
Fixes: 3b6d787e404 ("iris: move sysvals to their own constant buffer")
(cherry picked from commit 077a1952cceb9b577437c9e31be094427d5c7a9a)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=97792279e4987108b8596b5149a7f547673d3fb9
Author: Danylo Piliaiev <danylo.piliaiev at globallogic.com>
Date: Tue Aug 20 18:48:33 2019 +0300
nir/loop_analyze: Treat do{}while(false) loops as 0 iterations
Loops like:
block block_0:
vec1 32 ssa_2 = load_const (0x00000020)
vec1 32 ssa_3 = load_const (0x00000001)
loop {
vec1 32 ssa_7 = phi block_0: ssa_3, block_4: ssa_9
vec1 1 ssa_8 = ige ssa_2, ssa_7
if ssa_8 {
break
} else {
}
vec1 32 ssa_9 = iadd ssa_7, ssa_1
}
Were treated as having more than 1 iteration and after unrolling
produced wrong results, however such loop will exit during
the first iteration if not unrolled.
So we check if loop will actually loop.
Fixes tests/shaders/glsl-fs-loop-while-false-02.shader_test
Signed-off-by: Danylo Piliaiev <danylo.piliaiev at globallogic.com>
Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>
(cherry picked from commit e71fc7f2387dc14d08b7b310c41d83aa7a84c3b4)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3771534b2fef65b9853b9002e062d1f16c48e6d9
Author: Dylan Baker <dylan at pnwbakers.com>
Date: Wed Sep 11 09:05:32 2019 -0700
Bump version for rc3
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