Mesa (master): ac: move ac_get_num_physical_vgprs into radeon_info

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Module: Mesa
Branch: master
Commit: aae35fbd3a3eba176ac6fdf6357be49002a561ee
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=aae35fbd3a3eba176ac6fdf6357be49002a561ee

Author: Marek Olšák <marek.olsak at amd.com>
Date:   Thu Sep 12 19:51:13 2019 -0400

ac: move ac_get_num_physical_vgprs into radeon_info

Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>

---

 src/amd/common/ac_gpu_info.c             |  1 +
 src/amd/common/ac_gpu_info.h             | 11 +----------
 src/gallium/drivers/radeonsi/si_shader.c |  6 +++---
 3 files changed, 5 insertions(+), 13 deletions(-)

diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index 9db6c330a1a..6f03732cc16 100644
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
@@ -597,6 +597,7 @@ bool ac_query_gpu_info(int fd, void *dev_p,
 	else
 		info->num_physical_sgprs_per_simd = 512;
 
+	info->num_physical_wave64_vgprs_per_simd = info->chip_class >= GFX10 ? 512 : 256;
 	return true;
 }
 
diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h
index 680c588a67a..a21bd51e29d 100644
--- a/src/amd/common/ac_gpu_info.h
+++ b/src/amd/common/ac_gpu_info.h
@@ -143,6 +143,7 @@ struct radeon_info {
 	uint32_t                    max_sh_per_se; /* shader arrays per shader engine */
 	uint32_t                    max_wave64_per_simd;
 	uint32_t                    num_physical_sgprs_per_simd;
+	uint32_t                    num_physical_wave64_vgprs_per_simd;
 
 	/* Render backends (color + depth blocks). */
 	uint32_t                    r300_num_gb_pipes;
@@ -191,16 +192,6 @@ unsigned ac_get_compute_resource_limits(struct radeon_info *info,
 					unsigned max_waves_per_sh,
 					unsigned threadgroups_per_cu);
 
-static inline unsigned ac_get_num_physical_vgprs(enum chip_class chip_class,
-						 unsigned wave_size)
-{
-	/* The number is per SIMD. */
-	if (chip_class >= GFX10)
-		return wave_size == 32 ? 1024 : 512;
-	else
-		return 256;
-}
-
 #ifdef __cplusplus
 }
 #endif
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index fde6801fdce..49532b4c28a 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -5460,7 +5460,7 @@ static void si_calculate_max_simd_waves(struct si_shader *shader)
 	if (conf->num_vgprs) {
 		/* Always print wave limits as Wave64, so that we can compare
 		 * Wave32 and Wave64 with shader-db fairly. */
-		unsigned max_vgprs = ac_get_num_physical_vgprs(sscreen->info.chip_class, 64);
+		unsigned max_vgprs = sscreen->info.num_physical_wave64_vgprs_per_simd;
 		max_simd_waves = MIN2(max_simd_waves, max_vgprs / conf->num_vgprs);
 	}
 
@@ -7176,8 +7176,8 @@ int si_compile_tgsi_shader(struct si_screen *sscreen,
 	 */
 	if (sel->type == PIPE_SHADER_COMPUTE) {
 		unsigned wave_size = sscreen->compute_wave_size;
-		unsigned max_vgprs = ac_get_num_physical_vgprs(sscreen->info.chip_class,
-							       wave_size);
+		unsigned max_vgprs = sscreen->info.num_physical_wave64_vgprs_per_simd *
+				     (wave_size == 32 ? 2 : 1);
 		unsigned max_sgprs = sscreen->info.num_physical_sgprs_per_simd;
 		unsigned max_sgprs_per_wave = 128;
 		unsigned simds_per_tg = 4; /* assuming WGP mode on gfx10 */