Mesa (master): intel/fs: Allow CLUSTER_BROADCAST to do type conversion
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Fri Sep 20 19:03:31 UTC 2019
Module: Mesa
Branch: master
Commit: 651725f7a154e9b33093a2d725a0c2581fbd5480
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=651725f7a154e9b33093a2d725a0c2581fbd5480
Author: Jason Ekstrand <jason at jlekstrand.net>
Date: Tue Jun 4 11:45:50 2019 -0500
intel/fs: Allow CLUSTER_BROADCAST to do type conversion
We can't really handle it in the little-core 64-bit case but it's not
really needed there. Where we really want this is for when we need to
do 16 -> 8-bit conversions.
Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
---
src/intel/compiler/brw_fs_generator.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp
index 6756461bc6d..b34280d5c5a 100644
--- a/src/intel/compiler/brw_fs_generator.cpp
+++ b/src/intel/compiler/brw_fs_generator.cpp
@@ -2134,7 +2134,6 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width,
break;
case SHADER_OPCODE_CLUSTER_BROADCAST: {
- assert(src[0].type == dst.type);
assert(!src[0].negate && !src[0].abs);
assert(src[1].file == BRW_IMMEDIATE_VALUE);
assert(src[1].type == BRW_REGISTER_TYPE_UD);
@@ -2171,6 +2170,7 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width,
* indirect here to handle adding 4 bytes to the offset and avoid
* the extra ADD to the register file.
*/
+ assert(src[0].type == dst.type);
brw_MOV(p, subscript(dst, BRW_REGISTER_TYPE_D, 0),
subscript(strided, BRW_REGISTER_TYPE_D, 0));
brw_MOV(p, subscript(dst, BRW_REGISTER_TYPE_D, 1),
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