Mesa (19.2): 28 new commits
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gitlab-mirror at kemper.freedesktop.org
Wed Sep 25 16:58:37 UTC 2019
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0c47b502c23c28f7dd993fd069b9193653dfb586
Author: Dylan Baker <dylan at pnwbakers.com>
Date: Wed Sep 25 09:56:31 2019 -0700
Bump version for 19.2.0 final
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8ea440fa3a0887f2fecda9000edb9d03daf69124
Author: Dylan Baker <dylan at pnwbakers.com>
Date: Wed Sep 25 09:55:33 2019 -0700
docs: Add release notes for 19.2.0
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e59e9cd58a95d8dc9b06d09f2abed96ba7b1a1b9
Author: Eric Engestrom <eric.engestrom at intel.com>
Date: Thu Sep 19 14:18:55 2019 +0100
meson: re-add incorrect pkg-config files with GLVND for backward compatibility
This is a bit counter-intuitive, but the issue is that GLVND is broken
in versions <= 1.1.1, so we need to keep wrongly providing these files
to cover up their mistake, otherwise the rest of the world ends up
broken.
Suggested-by: Dylan Baker <dylan at pnwbakers.com>
Cc: mesa-stable at lists.freedesktop.org
Signed-off-by: Eric Engestrom <eric.engestrom at intel.com>
Reviewed-by: Dylan Baker <dylan at pnwbakers.com>
(cherry picked from commit 93df862b6affb6b8507e40601212a58012bfa873)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0d781fe4b8df644018e13f385640ac296498538c
Author: Mauro Rossi <issor.oruam at gmail.com>
Date: Sun Sep 8 17:35:22 2019 +0200
android: anv: libmesa_vulkan_common: add libmesa_util static dependency
Change needed to fix the following building error:
In file included from external/mesa/src/intel/vulkan/anv_device.c:43:
external/mesa/src/util/xmlpool.h:115:10: fatal error: 'xmlpool/options.h' file not found
^~~~~~~~~~~~~~~~~~~
1 error generated.
Fixes: 4dcb1ff ("anv: add support for driconf")
Signed-off-by: Mauro Rossi <issor.oruam at gmail.com>
Reviewed-by: Eric Engestrom <eric at engestrom.ch>
(cherry picked from commit ae5ac26dfa13de84c09f897c828cf621729ce622)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ba8b282ae49abebaa7242ab0bd8a061dcfea5c31
Author: Mauro Rossi <issor.oruam at gmail.com>
Date: Sun Jul 14 10:53:19 2019 +0200
android: mesa: revert "Enable asm unconditionally"
This patch partially reverts 20294dc ("mesa: Enable asm unconditionally, ...")
Android makefile build logic needs to disable assembler optimization
in 32bit builds to avoid text relocations for libglapi.so shared
Fixes the following build error with Android x86 32bit target:
[ 0% 4/477] target SharedLib: libglapi (out/target/product/x86/obj/SHARED_LIBRARIES/libglapi_intermediates/LINKED/libglapi.so)
FAILED: out/target/product/x86/obj/SHARED_LIBRARIES/libglapi_intermediates/LINKED/libglapi.so
...
prebuilts/gcc/linux-x86/x86/x86_64-linux-android-4.9/x86_64-linux-android/bin/ld: warning: shared library text segment is not shareable
prebuilts/gcc/linux-x86/x86/x86_64-linux-android-4.9/x86_64-linux-android/bin/ld: error: treating warnings as errors
clang-6.0: error: linker command failed with exit code 1 (use -v to see invocation)
Fixes: 20294dc ("mesa: Enable asm unconditionally, now that gen_matypes is gone.")
Signed-off-by: Mauro Rossi <issor.oruam at gmail.com>
Acked-by: Eric Engestrom <eric at engestrom.ch>
(cherry picked from commit 7a6e7803a791724841346b4b274ce68bcf3fff3f)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f7e25ae6d6ff2eb16e076a1a9052631d1a13997b
Author: Erik Faye-Lund <erik.faye-lund at collabora.com>
Date: Sun Sep 1 10:05:12 2019 +0200
util: fix SSE-version needed for double opcodes
This code generates CVTSD2SI, which requires SSE2. So let's fix the
required SSE-version.
Signed-off-by: Erik Faye-Lund <erik.faye-lund at collabora.com>
Fixes: 5de29ae (util: try to use SSE instructions with MSVC and 32-bit gcc)
Reviewed-by: Matt Turner <mattst88 at gmail.com>
(cherry picked from commit 2ade1c5cf790ab8df62e4ff9d67e360ac870ff1f)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5037ffb646d4be7c6f22dc5f2b9fee948561a546
Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date: Tue Sep 24 02:53:21 2019 +0200
radv: Add workaround for hang in The Surge 2.
Released today and hangs on RADV. We don't have the root cause yet,
but this should unblock people playing the game.
No drirc because the radv debugflags are not usable from drirc and
I want this backported.
CC: <mesa-stable at lists.freedesktop.org>
Reviewed-by: Dave Airlie <airlied at redhat.com>
(cherry picked from commit 780182f0a0caa9b6f48f87b1930b3bcba1ac9319)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c90dc1232dddcc41dcfca8316165015832f551c0
Author: Juan A. Suarez Romero <jasuarez at igalia.com>
Date: Tue Sep 10 10:30:43 2019 +0200
bin/get-pick-list.sh: sha1 commits can be smaller than 8 chars
The script only handles commits with "Fixes: <sha1>" where <sha1> is
equal or great than 8 chars. But <sha1> can be smaller, like 7 chars.
This commit relax the restriction to handle <sha1> 4 or more chars.
Fixes: 533fead4236 ("bin/get-pick-list.sh: tweak the commit sha matching pattern")
Acked-by: Eric Engestrom <eric.engestrom at intel.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez at igalia.com>
(cherry picked from commit b3c25e6f9953b6c7d196b47c6ba1987f681edf7d)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a1b6212710113a8d6161ac9922487c0832c1a363
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Aug 22 17:32:25 2019 -0700
intel: Increase Gen11 compute shader scratch IDs to 64.
From the MEDIA_VFE_STATE docs:
"Starting with this configuration, the Maximum Number of Threads must
be set to (#EU * 8) for GPGPU dispatches.
Although there are only 7 threads per EU in the configuration, the
FFTID is calculated as if there are 8 threads per EU, which in turn
requires a larger amount of Scratch Space to be allocated by the
driver."
It's pretty clear that we need to increase this for scratch address
calculations, because the FFTID has a certain bit-pattern. The quote
above seems to indicate that we should increase the actual thread count
programmed in MEDIA_VFE_STATE as well, but we think the intention is to
only bump the scratch space.
Fixes GPU hangs in Bioshock Infinite and Synmark's CSDof on Icelake 8x8.
Fixes: 5ac804bd9ac ("intel: Add a preliminary device for Ice Lake")
Reviewed-by: Matt Turner <mattst88 at gmail.com>
(cherry picked from commit b9e93db20896a436c716107dd0d12057b3aa9f72)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9f94cd7140c37554442665a56e7d09e873f9a8c0
Author: Marek Olšák <marek.olsak at amd.com>
Date: Wed Sep 18 17:05:09 2019 -0400
ac/addrlib: fix chip identification for Vega10, Arcturus, Raven2, Renoir
Cc: 19.2 <mesa-stable at lists.freedesktop.org>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
(cherry picked from commit 48742de601a8afea1e5f99637f5823a97ca21915)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5e289248a45734a158963551ea2caa0eef1d3068
Author: Marek Olšák <marek.olsak at amd.com>
Date: Mon Sep 23 15:08:38 2019 -0400
amd: add more PCI IDs for Navi14
trivial and urgent
Cc: 19.2 <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 65b698136c5ef0ef1a15cb6fbff13cbc4ceb3881)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=dc7129777fd3077a8c00ff0d4d7bc0e20dc4f04b
Author: Jason Ekstrand <jason at jlekstrand.net>
Date: Mon Sep 9 13:38:37 2019 -0500
nir/repair_ssa: Replace the unreachable check with the phi builder
In a3268599f3c9, I attempted to fix nir_repair_ssa for unreachable
blocks. However, that commit missed the possibility that the use is in
a block which, itself, is unreachable. In this case, we can end up in
an infinite loop trying to replace a def with itself. Even though a
no-op replacement is a fine operation, it keeps extending the end of the
uses list as we're walking it. Instead of explicitly checking for the
group of conditions, just check if the phi builder gives us a different
def. That's guaranteed to be 100% reliable and, while it lacks symmetry
with the is_valid checks, should be more reliable.
Fixes: a3268599 "nir/repair_ssa: Repair dominance for unreachable..."
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
(cherry picked from commit d63162cff0e0922fc3c2ef5dfd4402004caf141e)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6485fd83623099034727f14ba9253941fcfc6725
Author: Hal Gentz <zegentzy at protonmail.com>
Date: Sun Sep 15 15:29:50 2019 -0600
gallium/osmesa: Fix the inability to set no context as current.
Currently there is no way to make no context current w/gallium + osmesa.
The non-gallium version of osmesa does this if the context and buffer
passed to `OSMesaMakeCurrent` are both null. This small change makes it
so that this is also the case with the gallium version.
Cc: mesa-stable at lists.freedesktop.org
Signed-off-by: Hal Gentz <zegentzy at protonmail.com>
Reviewed-by: Eric Anholt <eric at anholt.net>
(cherry picked from commit 57c894334ee14c7075bc8c1fb8ff180631ccb527)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2d30c0fc5905c88f0208c2757e6e07976a8660c9
Author: Ian Romanick <ian.d.romanick at intel.com>
Date: Sat Aug 31 11:40:32 2019 -0700
nir/algebraic: Do not apply late DPH optimization in vertex processing stages
Some shaders do not use 'invariant' in vertex and (possibly) geometry
shader stages on some outputs that are intended to be invariant. For
various reasons, this optimization may not be fully applied in all
shaders used for different rendering passes of the same geometry. This
can result in Z-fighting artifacts (at best). For now, disable this
optimization in these stages.
In tessellation stages applications seem to use 'precise' when
necessary, so allow the optimization in those stages.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111490
Fixes: 09705747d72 ("nir/algebraic: Reassociate fadd into fmul in DPH-like pattern")
All Gen8+ platforms had similar results. (Ice Lake shown)
total instructions in shared programs: 16194726 -> 16344745 (0.93%)
instructions in affected programs: 2855172 -> 3005191 (5.25%)
helped: 6
HURT: 20279
helped stats (abs) min: 1 max: 3 x̄: 1.33 x̃: 1
helped stats (rel) min: 0.44% max: 1.00% x̄: 0.54% x̃: 0.44%
HURT stats (abs) min: 1 max: 32 x̄: 7.40 x̃: 7
HURT stats (rel) min: 0.14% max: 42.86% x̄: 8.58% x̃: 6.56%
95% mean confidence interval for instructions value: 7.34 7.45
95% mean confidence interval for instructions %-change: 8.48% 8.67%
Instructions are HURT.
total cycles in shared programs: 364471296 -> 365014683 (0.15%)
cycles in affected programs: 32421530 -> 32964917 (1.68%)
helped: 2925
HURT: 16144
helped stats (abs) min: 1 max: 403 x̄: 18.39 x̃: 5
helped stats (rel) min: <.01% max: 22.61% x̄: 1.97% x̃: 1.15%
HURT stats (abs) min: 1 max: 18471 x̄: 36.99 x̃: 15
HURT stats (rel) min: 0.02% max: 52.58% x̄: 5.60% x̃: 3.87%
95% mean confidence interval for cycles value: 21.58 35.41
95% mean confidence interval for cycles %-change: 4.36% 4.52%
Cycles are HURT.
(cherry picked from commit 92f70df8c38a36d913334c596ce26af64b6c569b)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ac9ef75a2529ad85d5562c3f6b7d7e4da43e834c
Author: Adam Jackson <ajax at redhat.com>
Date: Wed Sep 18 15:59:41 2019 -0400
docs: Update bug report URLs for the gitlab migration
Cc: mesa-stable at lists.freedesktop.org
Reviewed-by: Eric Anholt <eric at anholt.net>
Reviewed-by: Eric Engestrom <eric.engestrom at intel.com>
(cherry picked from commit 5b5c5bf8335b79c7c1152bbdf0956598d2246567)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=75836b70c753cb6bd6f32590dd048e843aaeaea1
Author: Andres Gomez <agomez at igalia.com>
Date: Wed Sep 18 12:44:13 2019 +0300
docs: Add the maximum implemented Vulkan API version in 19.2 rel notes
Currently, Vulkan 1.1.
Cc: 19.2 <mesa-stable at lists.freedesktop.org>
Signed-off-by: Andres Gomez <agomez at igalia.com>
Reviewed-by: Eric Engestrom <eric at engestrom.ch>
Reviewed-by: Dylan Baker <dylan at pnwbakers.com>
(cherry picked from commit 41b0e0d7e0f2353d337e68e8e439b5dfead880c4)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0b54e1d17656666891f332aa48b047a68c96d199
Author: Arcady Goldmints-Orlov <agoldmints at igalia.com>
Date: Thu Sep 12 14:20:22 2019 -0500
anv: fix descriptor limits on gen8
Later generations support bindless for samplers, images, and buffers and
thus per-stage descriptors are not limited by the binding table size.
However, gen8 doesn't support bindless images and thus needs to report a
lower per-stage limit so that all combinations of descriptors that fit
within the advertised limits are reported as supported by
vkGetDescriptorSetLayoutSupport.
Fixes test dEQP-VK.api.maintenance3_check.descriptor_set
Fixes: 79fb0d27f3 ("anv: Implement SSBOs bindings with GPU addresses in the descriptor BO")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
(cherry picked from commit 5ec5fecc26d1818157298c8507ba208f9f3501a1)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=00eaba776191f1c1ec76ada0021f553335282de0
Author: Tapani Pälli <tapani.palli at intel.com>
Date: Mon Jun 10 13:06:05 2019 +0300
egl: check for NULL value like eglGetSyncAttribKHR does
Commit d1e1563bb63 added a NULL check for eglGetSyncAttribKHR
but eglGetSyncAttrib does not do this. Patch adds same check to
happen with eglGetSyncAttrib.
Fixes crashes in (when exposing EGL 1.5):
dEQP-EGL.functional.fence_sync.invalid.get_invalid_value
Signed-off-by: Tapani Pälli <tapani.palli at intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom at intel.com>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit 99cbec0a5f463fef4d9c61f34482d9eb00293704)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=770e77dcd113cbf3ec9bd04b947647e645b99547
Author: Paulo Zanoni <paulo.r.zanoni at intel.com>
Date: Wed Sep 4 15:07:20 2019 -0700
intel/fs: fix SHADER_OPCODE_CLUSTER_BROADCAST for SIMD32
The current code can create functions with a width of 32, which is not
supported by our hardware. Add some code to simplify how we express
what we want and prevent such cases.
For some unknown reason, all the tests I could run seem to work even
with these unsupported MOVs.
Fixes: b0858c1cc6 "intel/fs: Add a couple of simple helper opcodes"
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
(cherry picked from commit 8e614c7a29a8926b20f5c18ef447ff82cafb7f1c)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0c29a15a0975b0b685dc24000e468288eac25c92
Author: Eric Engestrom <eric.engestrom at intel.com>
Date: Wed Sep 18 21:48:49 2019 +0100
gl: drop incorrect pkg-config file for glvnd
Akin to 1a25980c469b38d2c645 ("egl: drop incorrect pkg-config file for
glvnd") and b01524fff05eef66e8cd ("meson: don't build libGLES*.so with
GLVND") , removes a pkg-config file that shouldn't have been there in
the first place, but was needed because of that GLVND bug.
Now that the glvnd bug has been fixed, it was apparent that this gl.pc
pkg-config file was forgotten to be removed, so let's do just that :)
Suggested-by: Matt Turner <mattst88 at gmail.com>
Cc: mesa-stable at lists.freedesktop.org
Signed-off-by: Eric Engestrom <eric.engestrom at intel.com>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
(cherry picked from commit a1de3011f380b6ffd5583708b58e3f86d8d45ea9)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=401de43891b83376ca9db4986ce262be1057a121
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date: Wed Sep 18 16:58:06 2019 +0200
radv/gfx10: fix VK_KHR_pipeline_executable_properties with NGG GS
No GS copy shader if a pipeline enables NGG GS.
This fixes
dEQP-VK.pipeline.executable_properties.graphics.*geometry_stage*.
Fixes: 86864eedd2d ("radv: Implement radv_GetPipelineExecutablePropertiesKHR.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
(cherry picked from commit 99c186fbbe3e2da0f176eadb1db0a8a640786384)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e27644cc2e263c2bdfc0968d7dc056c28eb88464
Author: Dylan Baker <dylan at pnwbakers.com>
Date: Mon Sep 23 11:05:16 2019 -0700
bin/get-pick-list: use --oneline=pretty instead of --oneline
--oneline shortens hashes, while --oneline=pretty doesn't, otherwise
they are the same. Having full hashes is convenient as that is the
format that the bin/.cherry-ignore script requires to work correctly.
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b1ea3dcc1f0273eb0fa1371911cdfd6b807254f6
Author: Dylan Baker <dylan at pnwbakers.com>
Date: Mon Sep 23 11:08:35 2019 -0700
rehardcode from origin/master to upstream/master
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6ee069f94ada4052c0e0bbcd481ec99a06d41db3
Author: Dylan Baker <dylan at pnwbakers.com>
Date: Wed Sep 18 09:03:55 2019 -0700
cherry-ignore: Add patches
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d0832208798987d2be9ba6acd2dbf1d996d7905a
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date: Wed Sep 18 16:21:57 2019 +0200
radv: fix loading 64-bit GS inputs
We have to load 2 32-bit integer and to cast correctly.
This fixes crashes with gs-double-interpolator.vk_shader_test.
Cc: 19.2 <mesa-stable at lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111734
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
(cherry picked from commit 68820007fddbb5b79f1b2b08e66ef14092053a95)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9bf80c2b53eb786978f28a1f295c0ee440867f93
Author: Bas Nieuwenhuizen <basni at chromium.org>
Date: Wed Sep 18 14:11:47 2019 +0200
tu: Set up glsl types.
Addresses this assert:
deqp-vk: ../mesa-freedreno-9999/src/compiler/glsl_types.cpp:1244: static const glsl_type *glsl_type::get_interface_instance(const glsl_struct_field *, unsigned int, enum glsl_interface_packing, bool, const char *): Assertion `glsl_type_users > 0' failed.
running dEQP-VK.api.smoke.triangle .
Fixes: 624789e3708 "compiler/glsl: handle case where we have multiple users for types"
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
(cherry picked from commit 7999e10cab93fe854fbc7accd4d8cf2e60726b75)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fa59ef37ed0a5a1fd585567a2267b0fd9b51e155
Author: Haihao Xiang <haihao.xiang at intel.com>
Date: Mon Sep 16 14:52:56 2019 +0800
i965: support AYUV/XYUV for external import only
Fixes: 89785e2d56e7fa ("i965: add support for sampling from AYUV")
Fixes: 7cab8d3661f243 ("i965: Add support for sampling from XYUV images")
Cc: Vivek Kasireddy <vivek.kasireddy at intel.com>
Cc: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Signed-off-by: Haihao Xiang <haihao.xiang at intel.com>
Reviewed-by: Tapani Pälli <tapani.palli at intel.com>
(cherry picked from commit 8a9b81ab9dbd44ea4ce87b8fb8ebc4ec3530a3f9)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0ff13c291b5ccaa0b6683bd32f081f00614f8e44
Author: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
Date: Tue Dec 4 16:41:36 2018 +0100
intel/nir: do not apply the fsin and fcos trig workarounds for consts
If we have fsin or fcos trigonometric operations with constant values
as inputs, we will multiply the result by 0.99997 in
brw_nir_apply_trig_workarounds, making the result wrong.
Adjusting the rules so they do not apply to const values we let a
later constant fold to deal with it.
v2:
- Do not early constant fold but only apply the trig workaround for
non constants (Caio).
- Add fixes tag to commit log (Caio).
Fixes: bfd17c76c12 "i965: Port INTEL_PRECISE_TRIG=1 to NIR."
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
Signed-off-by: Andres Gomez <agomez at igalia.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
(cherry picked from commit 3c474f851313db5318d727d017b763ea2cb01e6d)
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