Mesa (master): lima: do not set the PP uniforms address lowest bits

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Module: Mesa
Branch: master
Commit: 931fc2a7b3f98c348ed24292d0e85b51ba1b1543
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=931fc2a7b3f98c348ed24292d0e85b51ba1b1543

Author: Icenowy Zheng <icenowy at aosc.io>
Date:   Thu Sep 26 23:25:09 2019 +0800

lima: do not set the PP uniforms address lowest bits

The PP uniforms address register in render state is not a direct pointer
to the uniforms storage -- instead, it points to an one-item array, and
the array item is the real pointer to the uniforms storage.

This register reuses some of its LSBs as a size field. Currently the
size is set according to the length of the real uniforms storage.
However, as the register itself contains only a pointer to the one-item
array, the size field should be set to the length of the one-item array
and subtract it by 1, which means a fixed value of 0. That means we can
just omit it now.

Test shows this should be the correct approach to set this register.

Signed-off-by: Icenowy Zheng <icenowy at aosc.io>
Reviewed-by: Vasily Khoruzhick <anarsoul at gmail.com>

---

 src/gallium/drivers/lima/lima_draw.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/src/gallium/drivers/lima/lima_draw.c b/src/gallium/drivers/lima/lima_draw.c
index 0cb41d2070d..0449eaba7cd 100644
--- a/src/gallium/drivers/lima/lima_draw.c
+++ b/src/gallium/drivers/lima/lima_draw.c
@@ -1086,7 +1086,6 @@ lima_pack_render_state(struct lima_context *ctx, const struct pipe_draw_info *in
    if (ctx->const_buffer[PIPE_SHADER_FRAGMENT].buffer) {
       render->uniforms_address =
          lima_ctx_buff_va(ctx, lima_ctx_buff_pp_uniform_array, LIMA_CTX_BUFF_SUBMIT_PP);
-      render->uniforms_address |= ((ctx->buffer_state[lima_ctx_buff_pp_uniform].size) / 4 - 1);
       render->aux0 |= 0x80;
       render->aux1 |= 0x10000;
    }