Mesa (master): intel/nir: Lower memory access bit sizes later
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Fri Apr 3 20:51:09 UTC 2020
Module: Mesa
Branch: master
Commit: c1bcb025dba7b73a865916dcda616d0479c94476
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c1bcb025dba7b73a865916dcda616d0479c94476
Author: Jason Ekstrand <jason at jlekstrand.net>
Date: Fri Mar 27 23:33:27 2020 -0500
intel/nir: Lower memory access bit sizes later
We're about to do load/store vectorization right before this but we need
that to happen after we've done a round of optimization. Otherwise,
we'll be getting unoptimized NIR in from ANV and the vectorizer won't be
able to do anything with it.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4367>
---
src/intel/compiler/brw_nir.c | 14 ++++++++++++--
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
index c7e9c0e1129..8a6cc8fe696 100644
--- a/src/intel/compiler/brw_nir.c
+++ b/src/intel/compiler/brw_nir.c
@@ -861,8 +861,6 @@ brw_postprocess_nir(nir_shader *nir, const struct brw_compiler *compiler,
UNUSED bool progress; /* Written by OPT */
- OPT(brw_nir_lower_mem_access_bit_sizes, devinfo);
-
OPT(nir_opt_combine_memory_barriers, combine_all_barriers, NULL);
do {
@@ -872,6 +870,18 @@ brw_postprocess_nir(nir_shader *nir, const struct brw_compiler *compiler,
brw_nir_optimize(nir, compiler, is_scalar, false);
+ if (OPT(brw_nir_lower_mem_access_bit_sizes, devinfo)) {
+ do {
+ progress = false;
+ OPT(nir_lower_pack);
+ OPT(nir_copy_prop);
+ OPT(nir_opt_dce);
+ OPT(nir_opt_cse);
+ OPT(nir_opt_algebraic);
+ OPT(nir_opt_constant_folding);
+ } while (progress);
+ }
+
if (OPT(nir_lower_int64, nir->options->lower_int64_options))
brw_nir_optimize(nir, compiler, is_scalar, false);
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