Mesa (master): 22 new commits

Sun Apr 5 23:41:27 UTC 2020

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=82597c46c3df19ba04fcb6694a5f4874cdc916ec
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date:   Wed Apr 1 12:59:53 2020 -0400

    pan/bit: Add mode to run unit tests
    
    Probably the most useful of the bunch going forward.
    
    Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
    Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=1a1c55709e486df80cd05e23a7a1b312d0066c0f
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date:   Sun Apr 5 18:45:00 2020 -0400

    pan/bit: Make run more useful
    
    ..by printing some output.
    
    Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=50476efb619b44e62aee605f083583e8300d24f1
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date:   Sun Apr 5 17:48:01 2020 -0400

    pan/bit: Add csel tests
    
    ..and pull out common instruction generation to reduce duplication in
    tests a bit.
    
    Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=9b262208b620fea21a7c44fbc74e17b846953ad1
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date:   Wed Apr 1 18:50:27 2020 -0400

    pan/bit: Add CSEL to interpreter
    
    Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=069189ff0f2beb3dd9004a1e37b8cc0cdeac4f23
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date:   Wed Apr 1 18:27:54 2020 -0400

    pan/bit: Add FMA tests
    
    Now that the earlier reg ctrl issue is fixed these should pass.
    
    Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=78ba6d50a42227812a3ba2b20f924f2d2cbf17db
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date:   Wed Apr 1 16:45:55 2020 -0400

    pan/bit: Add 16-bit fmod tests
    
    These raise another set of issues -- indeed, not all of these tests are
    passing, since it turns out I have an actual bug in the packing code. So
    after all this work, test bringup has identified an actual issue :)
    
    Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=40160c576d2c7f11e9690bb542a707a7cf0134af
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date:   Wed Apr 1 16:45:09 2020 -0400

    pan/bit: Add verbose printing for tests
    
    We'd like to dump both the generated IR (so we know exactly what's being
    tested) as well as the compiled program (so we know what's running for
    comparison).
    
    Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7c887d368e6d72f2b4d189a60a37ccee18b8a8cb
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date:   Wed Apr 1 16:24:15 2020 -0400

    pan/bit: Add helper for generating floating mod tests
    
    We can iterate them, isn't that adorable!
    
    Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=14c534386742b44bc02349684b0a0e3972fec91d
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date:   Wed Apr 1 14:40:33 2020 -0400

    pan/bit: Add packing test framework
    
    Given an instruction, we'd like to wrap it in a clause with some I/O on
    each end so we can pack it up and send it to the hardware to compare
    against the simulator.
    
    Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=5e3e32e368caabc50b669967b1a81b0f32102194
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date:   Wed Apr 1 13:13:50 2020 -0400

    pan/bit: Implement floating source mods
    
    Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=dbb8a564f2661fe8f665ea0f2e277c19259ba968
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date:   Wed Apr 1 13:08:00 2020 -0400

    pan/bit: Implement outmods
    
    Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ab5818560434333647a61e1e27255b4a29677c6c
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date:   Wed Apr 1 10:04:13 2020 -0400

    pan/bit: Add preliminary FMA/ADD/MOV implementations
    
    Missing some details about modifiers but the core structure should
    look like this for 32 and 16-bit, I think. My sincerest apologies for
    the macro magic, I tried to make it the least bad I could but trying to
    keep down repitition.
    
    Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=fbe504e2217a06930cbd62e775435b8234006a02
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date:   Wed Apr 1 09:50:38 2020 -0400

    pan/bit: Handle read/write
    
    We case the various sources and destinations to model register file
    access and passthrough in particular.
    
    Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7904a29340e151361421384d05bed0bdf4077b14
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date:   Wed Apr 1 09:41:20 2020 -0400

    pan/bit: Stub out BIR interpreter
    
    We'd like to step through a BIR program to evaluate it for testing.
    Let's stub out some infrastructure for modeling Bifrost.
    
    Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8eefb2765ab2253fe99ddf3ae32a2a901046d8d1
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date:   Sun Apr 5 19:22:01 2020 -0400

    pan/bi: Match CSEL argument order with hw
    
    It turns out ports need to be in order of the arguments of an
    instruction (port 3, that is), which breaks on instructions whose IR
    argument order is different from the packed order, like csel. So fix
    that.
    
    Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=9114ebbe798e101b6bb2b86219cfd3ba9793068f
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date:   Sun Apr 5 18:06:08 2020 -0400

    pan/bi: Add helper to debug port assignment
    
    Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0ab3f687c012c7e29fbb9da348bec1854ee85fd7
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date:   Wed Apr 1 18:22:01 2020 -0400

    pan/bi: Handle BIFROST_FIRST_WRITE_FMA_P2_READ_P3
    
    It's a special case for unclear reasons, and if you mess it up you get
    INSTR_INVALID_ENC. Isn't hardware fun?
    
    Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=75aabc6ea1616c44833db44255d3f33a0df368ca
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date:   Wed Apr 1 18:13:55 2020 -0400

    pan/bi: Allow BI_FMA to take mods
    
    It doesn't take abs but it can take outmod/neg.
    
    Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=69dde49f809dd00d76ee491e1e6a6d5b7e9b2ff2
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date:   Wed Apr 1 18:08:32 2020 -0400

    pan/bi: Don't gobble zero ports
    
    In case we've reading/writing R0.
    
    Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c7a6df4638de16299d9a621db31c9ee68e4addf6
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date:   Wed Apr 1 16:51:30 2020 -0400

    pan/bi: Fix negation in ADD.v2f16
    
    When we flip the sources we need to flip the negates as well to stay
    consistent.
    
    Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=5f48caf98ba536b9ed753f445ebf5488dc465f46
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date:   Wed Apr 1 16:51:17 2020 -0400

    pan/bi: Fix duplicated source in ADD.v2f16
    
    Typo.
    
    Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=08fe1081b72b16499329a56a0c5bc8de28168335
Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date:   Wed Apr 1 16:23:12 2020 -0400

    pan/bi: Export bi_class_name
    
    For use in naming tests.
    
    Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>