Mesa (master): freedreno/a6xx: set bypass RB_CCU_CNTL value for blitter
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Thu Apr 9 15:06:21 UTC 2020
Module: Mesa
Branch: master
Commit: cca7c299804703e686a3b9f04a978a994871853a
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cca7c299804703e686a3b9f04a978a994871853a
Author: Jonathan Marek <jonathan at marek.ca>
Date: Fri Mar 13 10:20:23 2020 -0400
freedreno/a6xx: set bypass RB_CCU_CNTL value for blitter
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3783>
---
src/gallium/drivers/freedreno/a6xx/fd6_blitter.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c
index 39e913bfbf7..d129183bfae 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c
@@ -157,6 +157,11 @@ emit_setup(struct fd_batch *batch)
fd6_event_write(batch, ring, PC_CCU_FLUSH_DEPTH_TS, true);
fd6_event_write(batch, ring, PC_CCU_INVALIDATE_COLOR, false);
fd6_event_write(batch, ring, PC_CCU_INVALIDATE_DEPTH, false);
+
+ /* normal BLIT_OP_SCALE operation needs bypass RB_CCU_CNTL */
+ OUT_WFI5(ring);
+ OUT_PKT4(ring, REG_A6XX_RB_CCU_CNTL, 1);
+ OUT_RING(ring, fd6_context(batch->ctx)->magic.RB_CCU_CNTL_bypass);
}
static uint32_t
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