Mesa (master): aco: ensure correct bit representation of subdword constants

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Module: Mesa
Branch: master
Commit: 1de18708cb5d3adba452f0c7f1aa3e8e6a6fd60b
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=1de18708cb5d3adba452f0c7f1aa3e8e6a6fd60b

Author: Daniel Schürmann <daniel at schuermann.dev>
Date:   Tue Apr  7 10:37:25 2020 +0100

aco: ensure correct bit representation of subdword constants

Reviewed-by: Rhys Perry <pendingchaos02 at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4492>

---

 src/amd/compiler/aco_instruction_selection.cpp | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp
index 711c64bcea8..7c88d0d75a6 100644
--- a/src/amd/compiler/aco_instruction_selection.cpp
+++ b/src/amd/compiler/aco_instruction_selection.cpp
@@ -3086,6 +3086,12 @@ void visit_load_const(isel_context *ctx, nir_load_const_instr *instr)
       int val = instr->value[0].b ? -1 : 0;
       Operand op = bld.lm.size() == 1 ? Operand((uint32_t) val) : Operand((uint64_t) val);
       bld.sop1(Builder::s_mov, Definition(dst), op);
+   } else if (instr->def.bit_size == 8) {
+      /* ensure that the value is correctly represented in the low byte of the register */
+      bld.sopk(aco_opcode::s_movk_i32, Definition(dst), instr->value[0].u8);
+   } else if (instr->def.bit_size == 16) {
+      /* ensure that the value is correctly represented in the low half of the register */
+      bld.sopk(aco_opcode::s_movk_i32, Definition(dst), instr->value[0].u16);
    } else if (dst.size() == 1) {
       bld.copy(Definition(dst), Operand(instr->value[0].u32));
    } else {