Mesa (master): panfrost: Unify vertex/tiler structures

GitLab Mirror gitlab-mirror at kemper.freedesktop.org
Fri Apr 10 15:11:42 UTC 2020


Module: Mesa
Branch: master
Commit: b010a6d5f15520677d34015c88ec89046b811372
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b010a6d5f15520677d34015c88ec89046b811372

Author: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Date:   Mon Apr  6 20:31:32 2020 -0400

panfrost: Unify vertex/tiler structures

Some fields were shuffled but these are essentially the same across the
generations.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4505>

---

 src/gallium/drivers/panfrost/pan_cmdstream.c |  28 ++++----
 src/gallium/drivers/panfrost/pan_context.c   |   2 +-
 src/panfrost/bifrost/test/bi_submit.c        |   4 +-
 src/panfrost/include/panfrost-job.h          |  47 +++++-------
 src/panfrost/pandecode/decode.c              | 103 +++++++++------------------
 5 files changed, 65 insertions(+), 119 deletions(-)

diff --git a/src/gallium/drivers/panfrost/pan_cmdstream.c b/src/gallium/drivers/panfrost/pan_cmdstream.c
index 5caf4576d96..038754f8c8e 100644
--- a/src/gallium/drivers/panfrost/pan_cmdstream.c
+++ b/src/gallium/drivers/panfrost/pan_cmdstream.c
@@ -84,12 +84,12 @@ panfrost_vt_update_rasterizer(struct panfrost_context *ctx,
 {
         struct panfrost_rasterizer *rasterizer = ctx->rasterizer;
 
-        tp->gl_enables |= 0x7;
-        SET_BIT(tp->gl_enables, MALI_FRONT_CCW_TOP,
+        tp->postfix.gl_enables |= 0x7;
+        SET_BIT(tp->postfix.gl_enables, MALI_FRONT_CCW_TOP,
                 rasterizer && rasterizer->base.front_ccw);
-        SET_BIT(tp->gl_enables, MALI_CULL_FACE_FRONT,
+        SET_BIT(tp->postfix.gl_enables, MALI_CULL_FACE_FRONT,
                 rasterizer && (rasterizer->base.cull_face & PIPE_FACE_FRONT));
-        SET_BIT(tp->gl_enables, MALI_CULL_FACE_BACK,
+        SET_BIT(tp->postfix.gl_enables, MALI_CULL_FACE_BACK,
                 rasterizer && (rasterizer->base.cull_face & PIPE_FACE_BACK));
         SET_BIT(tp->prefix.unknown_draw, MALI_DRAW_FLATSHADE_FIRST,
                 rasterizer && rasterizer->base.flatshade_first);
@@ -111,7 +111,7 @@ static void
 panfrost_vt_update_occlusion_query(struct panfrost_context *ctx,
                                    struct midgard_payload_vertex_tiler *tp)
 {
-        SET_BIT(tp->gl_enables, MALI_OCCLUSION_QUERY, ctx->occlusion_query);
+        SET_BIT(tp->postfix.gl_enables, MALI_OCCLUSION_QUERY, ctx->occlusion_query);
         if (ctx->occlusion_query)
                 tp->postfix.occlusion_counter = ctx->occlusion_query->bo->gpu;
         else
@@ -127,7 +127,7 @@ panfrost_vt_init(struct panfrost_context *ctx,
                 return;
 
         memset(vtp, 0, sizeof(*vtp));
-        vtp->gl_enables = 0x6;
+        vtp->postfix.gl_enables = 0x6;
         panfrost_vt_attach_framebuffer(ctx, vtp);
 
         if (stage == PIPE_SHADER_FRAGMENT) {
@@ -246,14 +246,14 @@ panfrost_vt_set_draw_info(struct panfrost_context *ctx,
 
                 /* Use the corresponding values */
                 *vertex_count = max_index - min_index + 1;
-                tp->offset_start = vp->offset_start = min_index + info->index_bias;
+                tp->postfix.offset_start = vp->postfix.offset_start = min_index + info->index_bias;
                 tp->prefix.offset_bias_correction = -min_index;
                 tp->prefix.index_count = MALI_POSITIVE(info->count);
                 draw_flags |= panfrost_translate_index_size(info->index_size);
         } else {
                 tp->prefix.indices = 0;
                 *vertex_count = ctx->vertex_count;
-                tp->offset_start = vp->offset_start = info->start;
+                tp->postfix.offset_start = vp->postfix.offset_start = info->start;
                 tp->prefix.offset_bias_correction = 0;
                 tp->prefix.index_count = MALI_POSITIVE(ctx->vertex_count);
         }
@@ -268,14 +268,14 @@ panfrost_vt_set_draw_info(struct panfrost_context *ctx,
                 unsigned shift = __builtin_ctz(ctx->padded_count);
                 unsigned k = ctx->padded_count >> (shift + 1);
 
-                tp->instance_shift = vp->instance_shift = shift;
-                tp->instance_odd = vp->instance_odd = k;
+                tp->postfix.instance_shift = vp->postfix.instance_shift = shift;
+                tp->postfix.instance_odd = vp->postfix.instance_odd = k;
         } else {
                 *padded_count = *vertex_count;
 
                 /* Reset instancing state */
-                tp->instance_shift = vp->instance_shift = 0;
-                tp->instance_odd = vp->instance_odd = 0;
+                tp->postfix.instance_shift = vp->postfix.instance_shift = 0;
+                tp->postfix.instance_odd = vp->postfix.instance_odd = 0;
         }
 }
 
@@ -1339,8 +1339,8 @@ panfrost_emit_vertex_data(struct panfrost_batch *batch,
                         /* Normal, non-instanced attributes */
                         attrs[k++].elements |= MALI_ATTR_LINEAR;
                 } else {
-                        unsigned instance_shift = vp->instance_shift;
-                        unsigned instance_odd = vp->instance_odd;
+                        unsigned instance_shift = vp->postfix.instance_shift;
+                        unsigned instance_odd = vp->postfix.instance_odd;
 
                         k += panfrost_vertex_instanced(ctx->padded_count,
                                                        instance_shift,
diff --git a/src/gallium/drivers/panfrost/pan_context.c b/src/gallium/drivers/panfrost/pan_context.c
index 2d268270954..4520dfe5ae7 100644
--- a/src/gallium/drivers/panfrost/pan_context.c
+++ b/src/gallium/drivers/panfrost/pan_context.c
@@ -191,7 +191,7 @@ panfrost_vertex_state_upd_attr_offs(struct panfrost_context *ctx,
          * QED.
          */
 
-        unsigned start = vp->offset_start;
+        unsigned start = vp->postfix.offset_start;
 
         for (unsigned i = 0; i < so->num_elements; ++i) {
                 unsigned vbi = so->pipe[i].vertex_buffer_index;
diff --git a/src/panfrost/bifrost/test/bi_submit.c b/src/panfrost/bifrost/test/bi_submit.c
index d827b25bc56..fac31b016e3 100644
--- a/src/panfrost/bifrost/test/bi_submit.c
+++ b/src/panfrost/bifrost/test/bi_submit.c
@@ -200,10 +200,8 @@ bit_vertex(struct panfrost_device *dev, panfrost_program prog,
         struct bifrost_payload_vertex payload = {
                 .prefix = {
                 },
-                .vertex = {
-                        .unk2 = 0x2,
-                },
                 .postfix = {
+                        .gl_enables = 0x2,
                         .shared_memory = shmem->gpu,
                         .shader = shader_desc->gpu,
                         .uniforms = ubo->gpu + 1024,
diff --git a/src/panfrost/include/panfrost-job.h b/src/panfrost/include/panfrost-job.h
index 118d8beb96f..5078ff60e3e 100644
--- a/src/panfrost/include/panfrost-job.h
+++ b/src/panfrost/include/panfrost-job.h
@@ -1019,14 +1019,6 @@ union midgard_primitive_size {
         u64 pointer;
 };
 
-struct bifrost_vertex_only {
-        u32 unk2; /* =0x2 */
-
-        u32 zero0;
-
-        u64 zero1;
-} __attribute__((packed));
-
 struct bifrost_tiler_heap_meta {
         u32 zero;
         u32 heap_size;
@@ -1058,13 +1050,25 @@ struct bifrost_tiler_only {
         mali_ptr tiler_meta;
 
         u64 zero1, zero2, zero3, zero4, zero5, zero6;
-
-        u32 gl_enables;
-        u32 zero7;
-        u64 zero8;
 } __attribute__((packed));
 
 struct mali_vertex_tiler_postfix {
+        u16 gl_enables; // 0x5 on Midgard, 0x2 on Bifrost
+
+        /* Both zero for non-instanced draws. For instanced draws, a
+         * decomposition of padded_num_vertices. See the comments about the
+         * corresponding fields in mali_attr for context. */
+
+        unsigned instance_shift : 5;
+        unsigned instance_odd : 3;
+
+        u8 zero4;
+
+        /* Offset for first vertex in buffer */
+        u32 offset_start;
+
+	u64 zero5;
+
         /* Zero for vertex jobs. Pointer to the position (gl_Position) varying
          * output from the vertex shader for tiler jobs.
          */
@@ -1105,23 +1109,6 @@ struct mali_vertex_tiler_postfix {
 
 struct midgard_payload_vertex_tiler {
         struct mali_vertex_tiler_prefix prefix;
-
-        u16 gl_enables; // 0x5
-
-        /* Both zero for non-instanced draws. For instanced draws, a
-         * decomposition of padded_num_vertices. See the comments about the
-         * corresponding fields in mali_attr for context. */
-
-        unsigned instance_shift : 5;
-        unsigned instance_odd : 3;
-
-        u8 zero4;
-
-        /* Offset for first vertex in buffer */
-        u32 offset_start;
-
-	u64 zero5;
-
         struct mali_vertex_tiler_postfix postfix;
 
         union midgard_primitive_size primitive_size;
@@ -1129,7 +1116,6 @@ struct midgard_payload_vertex_tiler {
 
 struct bifrost_payload_vertex {
         struct mali_vertex_tiler_prefix prefix;
-        struct bifrost_vertex_only vertex;
         struct mali_vertex_tiler_postfix postfix;
 } __attribute__((packed));
 
@@ -1144,7 +1130,6 @@ struct bifrost_payload_fused {
         struct bifrost_tiler_only tiler;
         struct mali_vertex_tiler_postfix tiler_postfix;
         u64 padding; /* zero */
-        struct bifrost_vertex_only vertex;
         struct mali_vertex_tiler_postfix vertex_postfix;
 } __attribute__((packed));
 
diff --git a/src/panfrost/pandecode/decode.c b/src/panfrost/pandecode/decode.c
index 917f4674667..f8fe008c0f9 100644
--- a/src/panfrost/pandecode/decode.c
+++ b/src/panfrost/pandecode/decode.c
@@ -527,17 +527,17 @@ pandecode_midgard_tiler_descriptor(
         MEMORY_PROP(t, polygon_list);
 
         /* The body is offset from the base of the polygon list */
-        assert(t->polygon_list_body > t->polygon_list);
+        //assert(t->polygon_list_body > t->polygon_list);
         unsigned body_offset = t->polygon_list_body - t->polygon_list;
 
         /* It needs to fit inside the reported size */
-        assert(t->polygon_list_size >= body_offset);
+        //assert(t->polygon_list_size >= body_offset);
 
         /* Check that we fit */
         struct pandecode_mapped_memory *plist =
                 pandecode_find_mapped_gpu_mem_containing(t->polygon_list);
 
-        assert(t->polygon_list_size <= plist->length);
+        //assert(t->polygon_list_size <= plist->length);
 
         /* Now that we've sanity checked, we'll try to calculate the sizes
          * ourselves for comparison */
@@ -1762,7 +1762,7 @@ bits(u32 word, u32 lo, u32 hi)
 static void
 pandecode_vertex_tiler_prefix(struct mali_vertex_tiler_prefix *p, int job_no, bool graphics)
 {
-        pandecode_log_cont("{\n");
+        pandecode_log(".prefix = {\n");
         pandecode_indent++;
 
         /* Decode invocation_count. See the comment before the definition of
@@ -2547,41 +2547,46 @@ pandecode_vertex_tiler_postfix_pre(
         }
 }
 
+static void
+pandecode_gl_enables(uint32_t gl_enables, int job_type)
+{
+        pandecode_log(".gl_enables = ");
+
+        pandecode_log_decoded_flags(gl_enable_flag_info, gl_enables);
+
+        pandecode_log_cont(",\n");
+}
+
 static void
 pandecode_vertex_tiler_postfix(const struct mali_vertex_tiler_postfix *p, int job_no, bool is_bifrost)
 {
         if (p->shader & 0xF)
                 pandecode_msg("warn: shader tagged %X\n", (unsigned) (p->shader & 0xF));
 
-        if (!(p->position_varying || p->occlusion_counter))
-                return;
-
         pandecode_log(".postfix = {\n");
         pandecode_indent++;
 
-        MEMORY_PROP(p, position_varying);
-        MEMORY_PROP(p, occlusion_counter);
-
-        pandecode_indent--;
-        pandecode_log("},\n");
-}
+        pandecode_gl_enables(p->gl_enables, JOB_TYPE_TILER);
+        pandecode_prop("instance_shift = 0x%x", p->instance_shift);
+        pandecode_prop("instance_odd = 0x%x", p->instance_odd);
 
-static void
-pandecode_vertex_only_bfr(struct bifrost_vertex_only *v)
-{
-        pandecode_log_cont("{\n");
-        pandecode_indent++;
+        if (p->zero4) {
+                pandecode_msg("XXX: vertex only zero tripped");
+                pandecode_prop("zero4 = 0x%" PRIx32, p->zero4);
+        }
 
-        pandecode_prop("unk2 = 0x%x", v->unk2);
+        pandecode_prop("offset_start = 0x%x", p->offset_start);
 
-        if (v->zero0 || v->zero1) {
+        if (p->zero5) {
                 pandecode_msg("XXX: vertex only zero tripped");
-                pandecode_prop("zero0 = 0x%" PRIx32, v->zero0);
-                pandecode_prop("zero1 = 0x%" PRIx64, v->zero1);
+                pandecode_prop("zero5 = 0x%" PRIx32, p->zero5);
         }
 
+        MEMORY_PROP(p, position_varying);
+        MEMORY_PROP(p, occlusion_counter);
+
         pandecode_indent--;
-        pandecode_log("}\n");
+        pandecode_log("},\n");
 }
 
 static void
@@ -2661,16 +2666,6 @@ pandecode_tiler_meta(mali_ptr gpu_va, int job_no)
         pandecode_log("};\n");
 }
 
-static void
-pandecode_gl_enables(uint32_t gl_enables, int job_type)
-{
-        pandecode_log(".gl_enables = ");
-
-        pandecode_log_decoded_flags(gl_enable_flag_info, gl_enables);
-
-        pandecode_log_cont(",\n");
-}
-
 static void
 pandecode_primitive_size(union midgard_primitive_size u, bool constant)
 {
@@ -2699,10 +2694,8 @@ pandecode_tiler_only_bfr(const struct bifrost_tiler_only *t, int job_no)
         /* TODO: gl_PointSize on Bifrost */
         pandecode_primitive_size(t->primitive_size, true);
 
-        pandecode_gl_enables(t->gl_enables, JOB_TYPE_TILER);
-
         if (t->zero1 || t->zero2 || t->zero3 || t->zero4 || t->zero5
-            || t->zero6 || t->zero7 || t->zero8) {
+            || t->zero6) {
                 pandecode_msg("XXX: tiler only zero tripped\n");
                 pandecode_prop("zero1 = 0x%" PRIx64, t->zero1);
                 pandecode_prop("zero2 = 0x%" PRIx64, t->zero2);
@@ -2710,8 +2703,6 @@ pandecode_tiler_only_bfr(const struct bifrost_tiler_only *t, int job_no)
                 pandecode_prop("zero4 = 0x%" PRIx64, t->zero4);
                 pandecode_prop("zero5 = 0x%" PRIx64, t->zero5);
                 pandecode_prop("zero6 = 0x%" PRIx64, t->zero6);
-                pandecode_prop("zero7 = 0x%" PRIx32, t->zero7);
-                pandecode_prop("zero8 = 0x%" PRIx64, t->zero8);
         }
 
         pandecode_indent--;
@@ -2730,12 +2721,7 @@ pandecode_vertex_job_bfr(const struct mali_job_descriptor_header *h,
         pandecode_log("struct bifrost_payload_vertex payload_%d = {\n", job_no);
         pandecode_indent++;
 
-        pandecode_log(".prefix = ");
         pandecode_vertex_tiler_prefix(&v->prefix, job_no, false);
-
-        pandecode_log(".vertex = ");
-        pandecode_vertex_only_bfr(&v->vertex);
-
         pandecode_vertex_tiler_postfix(&v->postfix, job_no, true);
 
         pandecode_indent--;
@@ -2757,7 +2743,6 @@ pandecode_tiler_job_bfr(const struct mali_job_descriptor_header *h,
         pandecode_log("struct bifrost_payload_tiler payload_%d = {\n", job_no);
         pandecode_indent++;
 
-        pandecode_log(".prefix = ");
         pandecode_vertex_tiler_prefix(&t->prefix, job_no, false);
 
         pandecode_log(".tiler = ");
@@ -2777,41 +2762,19 @@ pandecode_vertex_or_tiler_job_mdg(const struct mali_job_descriptor_header *h,
                 mali_ptr payload, int job_no, unsigned gpu_id)
 {
         struct midgard_payload_vertex_tiler *PANDECODE_PTR_VAR(v, mem, payload);
+        bool is_graphics = (h->job_type == JOB_TYPE_VERTEX) || (h->job_type == JOB_TYPE_TILER);
 
         pandecode_vertex_tiler_postfix_pre(&v->postfix, job_no, h->job_type, "", false, gpu_id);
 
         pandecode_log("struct midgard_payload_vertex_tiler payload_%d = {\n", job_no);
         pandecode_indent++;
 
-        bool has_primitive_pointer = v->prefix.unknown_draw & MALI_DRAW_VARYING_SIZE;
-        pandecode_primitive_size(v->primitive_size, !has_primitive_pointer);
-
-        bool is_graphics = (h->job_type == JOB_TYPE_VERTEX) || (h->job_type == JOB_TYPE_TILER);
-
-        pandecode_log(".prefix = ");
         pandecode_vertex_tiler_prefix(&v->prefix, job_no, is_graphics);
-
-        pandecode_gl_enables(v->gl_enables, h->job_type);
-
-        if (v->instance_shift || v->instance_odd) {
-                pandecode_prop("instance_shift = 0x%d /* %d */",
-                               v->instance_shift, 1 << v->instance_shift);
-                pandecode_prop("instance_odd = 0x%X /* %d */",
-                               v->instance_odd, (2 * v->instance_odd) + 1);
-
-                pandecode_padded_vertices(v->instance_shift, v->instance_odd);
-        }
-
-        if (v->offset_start)
-                pandecode_prop("offset_start = %d", v->offset_start);
-
-        if (v->zero5) {
-                pandecode_msg("XXX: midgard payload zero tripped\n");
-                pandecode_prop("zero5 = 0x%" PRIx64, v->zero5);
-        }
-
         pandecode_vertex_tiler_postfix(&v->postfix, job_no, false);
 
+        bool has_primitive_pointer = v->prefix.unknown_draw & MALI_DRAW_VARYING_SIZE;
+        pandecode_primitive_size(v->primitive_size, !has_primitive_pointer);
+
         pandecode_indent--;
         pandecode_log("};\n");
 



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