Mesa (master): aco: fix nir_op_pack_32_2x16_split if one operand is a constant
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Mon Apr 13 12:01:24 UTC 2020
Module: Mesa
Branch: master
Commit: fc1068de0d124b746cc85b58564810c5453feee3
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fc1068de0d124b746cc85b58564810c5453feee3
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date: Sat Apr 4 10:07:51 2020 +0200
aco: fix nir_op_pack_32_2x16_split if one operand is a constant
Because 16-bit constants are represented with the s1 RegClass, we
have to extract the low half.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Daniel Schürmann <daniel at schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4509>
---
src/amd/compiler/aco_instruction_selection.cpp | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp
index f713a761008..bc973a05e5a 100644
--- a/src/amd/compiler/aco_instruction_selection.cpp
+++ b/src/amd/compiler/aco_instruction_selection.cpp
@@ -2771,6 +2771,8 @@ void visit_alu_instr(isel_context *ctx, nir_alu_instr *instr)
Temp src0 = get_alu_src(ctx, instr->src[0]);
Temp src1 = get_alu_src(ctx, instr->src[1]);
if (dst.regClass() == v1) {
+ src0 = emit_extract_vector(ctx, src0, 0, v2b);
+ src1 = emit_extract_vector(ctx, src1, 0, v2b);
bld.pseudo(aco_opcode::p_create_vector, Definition(dst), src0, src1);
} else {
src0 = bld.sop2(aco_opcode::s_and_b32, bld.def(s1), bld.def(s1, scc), src0, Operand(0xFFFFu));
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